PCI Express 7.0 Specs Released (tomshardware.com) 15
The PCI-SIG, which oversees the development of the PCIe specification, has officially released the final spec for PCI Express 7.0. "The PCIe 7.0 specification increases the per-lane data transfer rate to 128 GT/s in each direction, which is twice as fast as PCIe 6.0 supports and four times faster than PCIe 5.0," reports Tom's Hardware. "Such a significant performance increase enables devices with 16 PCIe 7.0 lanes to transfer up to 256 GB/s in each direction, not accounting for protocol overhead. The new version of the interface continues to use PAM4 signaling while maintaining the 1b/1b FLIT encoding method first introduced in PCIe 6.0." From the report: To achieve PCIe 7.0's 128 GT/s record data transfer rate, developers of PCIe 7.0 had to increase the physical signaling rate to 32 GHz or beyond. Keep in mind that both PCIe 5.0 and 6.0 use a physical signaling rate of 16 GHz to enable 32 GT/s using NRZ signaling and 64 GT/s using PAM4 signaling (which allows transfers of two bits per symbol). With PCIe 7.0, developers had to boost the physical frequency for the first time since 2017, which required tremendous work at various levels, as maintaining signal integrity at 32 GHz over long distances using copper wires is extremely challenging.
Beyond raw throughput, the update also offers improved power efficiency and stronger support for longer or more complex electrical channels, particularly when using a cabling solution, to cater to the needs of next-generation data center-grade bandwidth-hungry applications, such as 800G Ethernet, Ultra Ethernet, and quantum computing, among others. [...] With the PCIe 7.0 standard officially released, members of the PCI-SIG, including AMD, Intel, and Nvidia, can begin finalizing the development of their platforms that support the PCIe specifications. PCI-SIG plans to start preliminary compliance tests in 2027, with official interoperability tests scheduled for 2028. Therefore, expect actual PCIe 7.0 devices and platforms on the market sometime in 2028 - 2029, if everything goes as planned. PCI-SIG also announced that pathfinding for PCIe 8.0 is underway, and members of the organization are actively exploring possibilities and defining capabilities of a standard that they are going to use in 2030 and beyond.
"Interestingly, when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction (and therefore enable bandwidth of 1 TB/s in both directions using 16 lanes), Al Yanes, president of PCI-SIG, said that while this is an intention, he would not like to make any definitive claims," reports Tom's Hardware. "Additionally, he stated that PCI-SIG is looking forward to enabling PCIe 8.0, which will offer higher performance over copper wires in addition to optical interconnects."
Beyond raw throughput, the update also offers improved power efficiency and stronger support for longer or more complex electrical channels, particularly when using a cabling solution, to cater to the needs of next-generation data center-grade bandwidth-hungry applications, such as 800G Ethernet, Ultra Ethernet, and quantum computing, among others. [...] With the PCIe 7.0 standard officially released, members of the PCI-SIG, including AMD, Intel, and Nvidia, can begin finalizing the development of their platforms that support the PCIe specifications. PCI-SIG plans to start preliminary compliance tests in 2027, with official interoperability tests scheduled for 2028. Therefore, expect actual PCIe 7.0 devices and platforms on the market sometime in 2028 - 2029, if everything goes as planned. PCI-SIG also announced that pathfinding for PCIe 8.0 is underway, and members of the organization are actively exploring possibilities and defining capabilities of a standard that they are going to use in 2030 and beyond.
"Interestingly, when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction (and therefore enable bandwidth of 1 TB/s in both directions using 16 lanes), Al Yanes, president of PCI-SIG, said that while this is an intention, he would not like to make any definitive claims," reports Tom's Hardware. "Additionally, he stated that PCI-SIG is looking forward to enabling PCIe 8.0, which will offer higher performance over copper wires in addition to optical interconnects."
Optical interconnects? (Score:2)
I wonder how the best way would be to have a slot that works not just with copper, but fiber interconnects. Maybe have a fiber cable that plugs into the board and the motherboard?
Re: (Score:2)
TFA mentions that we are approaching the limits of what copper can transfer, data-wise, so the next step up from that is optical. This is similar to why copper has topped out at 40Gb with copper and cat 8 cables.
Re: (Score:2)
Are you telling me that those 400Gbps DAC cables I have just purchased won't work because they are copper?
I would note that no products have ever been offered for sale that support 40GBase-T and given 40Gbps Ethernet is a dead end nothing ever will.
I would be surprised if anything is ever offered in 25GBase-T either as it suffers from distance limitations too. It's all DAC or optics in the data centre so there is nothing to jumpstart the market. It's a bit like 10GBase-T. I have hundreds of 10Gbps ports but
Re: (Score:2)
It makes a lot more sense to have a dedicated fiber connection.
If they are going to add anything to the existing slots, it should be a high power connector.
128 or 256 GT/s in each direction? (Score:2)
TFS appears to contain a contradiction:
PCIe 7.0 specification ... to 128 GT/s in each direction ... ... ... ... ...
enables devices with 16 PCIe 7.0 lanes to transfer up to 256 GB/s in each direction
To achieve PCIe 7.0's 128 GT/s record data transfer rate
when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction
I'm guessing PCIe 7.0 is 128 GT/s in each direction, and PCIe 8 is still toying with the idea of 256 GT/s in each direction.
Re: (Score:2)
GigaTransfers != Gigabytes. If anything TFA simply used the wrong number for the second line you posted.
16x PCIe 7.0 lanes give you 128 GT/s in each direction, but when considering signaling overhead and error correction it works out to only 242 GB/s. PCIe 7.0 uses PAM4 signaling as well so presumably it would have a similar overhead and you could expect 484GB/s out of its 256GT/s (not 512GB/s)
broads need more switches so slower devices can ma (Score:1)
broads need more switches so slower devices can make use of one X16 link from the cpu
Really looking forward to seeing (Score:3)
I have a PCI 3.0 motherboard and the 5060 cards are basically useless to me because they only have eight PCI Lanes wrecking the bandwidth. Assuming I get around to upgrading this year it'll be a 9060 XT 16 GB model from AMD as a result.
Re: Really looking forward to seeing cock in ass (Score:2)
Every accusation is a confession. Golf clap for starting down the road to self acceptance.
Re:Really looking forward to seeing (Score:5, Insightful)
How Nvidia will cripple their mid range graphics cards on the new bus.
Not reason to worry any time soon, as you won't see PCIe 7.0 in consumer boards for many years (this is for servers). We may finally see PCIe 6.0 in a consumer board later this year, making it almost four years since that standard was released before a board may appear.
Re: (Score:2)
Likewise with PCI 4.0 cards in a PCI 3.0 motherboard:
[ 0.768734] [ T1] pci 0000:43:00.0: 126.016 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x16 link at 0000:40:03.1 (capable of 252.048 Gb/s with 16.0 GT/s PCIe x16 link)
or in a physically-x16-really-x4 slot:
[ 0.777737][ T1] pci 0000:09:00.0: 31.504 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x4 link at 0000:00:03.1 (capable of 126.024 Gb/s with 16.0 GT/s PCIe x8 link)
The second card has same problem as yours, when in a re