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Hardware Technology

A New Generation Is Uncovering the Tiny Doodles Left By Engineers On Old Microchips (npr.org) 25

An anonymous reader quotes a report from NPR: An owl. A sharky looking bullet. The Hindu deity Ganesh. The Yin and Yang sign. All painstakingly selected and etched onto a microchip that measures about an inch square. Each microscopic silicon doodle was the handiwork of engineers at Qualcomm Incorporated, a San Diego-based company that creates wireless technology-related products and services. The engineers slipped the drawings into Qualcomm's Q1650 data decoder with care not to disturb any of the chip's functions. They were purposeless etchings, never meant to be uncovered.

These doodles, also known as silicon art, chip graffiti or chip art, and dozens others like it, are remnants of tech history -- from Silicon Valley's infancy to the early 2000s -- when innovation was rapid fire and the tech still had a very human touch. Engineers would add the sketches to their microchip designs in the techie equivalent of signing their artwork. They'd etch them on chips that may end up in your cellphone, laptop or calculator. They spent hours crafting them, even though they were frowned upon by those in the C Suite.

The existence of these doodles came to light decades ago, but social media is discovering them anew. And there is now a small but determined group of online hobbyists working to keep that history alive. They are still cataloguing the miniscule drawings -- many smaller than the width of a human hair and can't be seen without a microscope. These devotees post glossy videos of themselves shucking chips like oysters to see their iridescent insides and the itsy bitsy sketches that may be hidden on them. And they are eagerly saving them from the scrap heap.

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A New Generation Is Uncovering the Tiny Doodles Left By Engineers On Old Microchips

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  • I remember this well (Score:5, Interesting)

    by dskoll ( 99328 ) on Tuesday April 16, 2024 @04:26PM (#64399428) Homepage

    From 1996-1999, I worked for a company that reverse-engineered ICs and I remember seeing many of these doodles. However, my absolute favorite chip was some TI analog chip (I think) where the engineers had very helpfully labeled some of the important signal names next to the wires that were carrying them. That simplified the reverse-engineering tremendously. Thanks, TI folks!

    • by AmiMoJo ( 196126 ) on Wednesday April 17, 2024 @06:33AM (#64400736) Homepage Journal

      I was told to do that on a PCB I made once, except that VCC and GND were deliberately swapped so that anyone not paying attention would fry the board.

      I thought it would have been better to mix up the MCU programming lines so that anyone not paying enough attention would just assume that the debug interface had been disabled to protect the firmware.

    • by necro81 ( 917438 )
      I have heard anecdotes of chip engineers in the 60's to 80's adding snarky messages in Russian and German to their dies. It was well known that East Germans and the Soviets were reverse-engineering American parts, trying desperately to jump-start their own lithography. Things along the lines of "go ahead and try to copy, but your fabs are so shit it won't work." Here's a video that touches on that history [youtube.com].
  • by flightmaker ( 1844046 ) on Tuesday April 16, 2024 @04:34PM (#64399446)

    from Plessey had a steam loco on it because the chain of cells resembled a railway track.

    • by bokske ( 1429119 )
      Hey I remember the steam locomotive silicon art ! My coworkers at Alcatel around 1996 put it in a telecom ASIC for network switches. So you're saying that this drawing was copied from some place else ?!
      • This was more like 1986. There was a two workstation Xerox document preparation system in the office which was the new thing at the time. I recall that the company jungle telegraph reckoned that the engineer who did the steam loco art had received a strongly worded dressing down from management for wasting company time. Trouble was, when photos of the chip got out to customers they absolutely loved the artwork and it became a marketing tool so management then had to go back to the engineer and say Pretty Pl

  • by RitchCraft ( 6454710 ) on Tuesday April 16, 2024 @04:36PM (#64399448)

    These went out of favor when the UK found them to be offensive.

    • These went out of favor when the UK found them to be offensive.

      Only if it's a deepfake of another chip.

  • by quonset ( 4839537 ) on Tuesday April 16, 2024 @05:17PM (#64399534)

    Christina Balan worked for Tesla and had her initials engraved on every Model S battery [bbc.com]. Right up to the moment she warned Tesla of a serious design flaw in its vehicles. After which she was fired.

    That design flaw? Carpets were curling under the brake pedal which could prevent correct operation of the brake. Once she informed managemennt, then Musty himself since he said anyone could contact him with any issue, she was out the door in retaliation. A decade later she's still in court fighting her dismissal and hopes she can live long enough to see justice done as she is recovering from breast cancer.

    Hans Kristian Graebener = StoneToss

    • by Anonymous Coward

      Elon Musk is an asshole!

  • by mistergrumpy ( 7379416 ) on Tuesday April 16, 2024 @05:44PM (#64399598)
    chip pictures [fsu.edu]
    My favorites is from a 1980's DEC VAX chip. It's in Russian (Cyrillic) and says "VAX - when you care enough to steal the very best"
  • Not purposeless (Score:4, Interesting)

    by dgatwood ( 11270 ) on Tuesday April 16, 2024 @05:44PM (#64399600) Homepage Journal

    These actually likely served a purpose. If some other company made an exact copy of their mask, they could go to court and immediately prove that it was a copy. It's the chip design equivalent of the "Stolen from Apple" art hidden inside the Mac ROM code so that if someone tried to sell a clone similar to what happened with the Franklin Ace, they would potentially have an easy way to prove in court that the code was copied.

    • by dskoll ( 99328 )

      That seems far-fetched. If someone makes an exact copy of a chip, it's blindingly obvious even without doodles.

      And obtaining the masks is not that easy. You'd have to intercept them on the way from the design house to the fab, or have someone on the inside give you them. All in all, I think it's very unlikely anyone would do this.

      • by guruevi ( 827432 )

        Depends on the complexity of the chip. Most chips aren’t microcontrollers (or at least they weren’t in that era), we are talking about the 555, logic gates and other ‘basic’ chips, there is really only a few ways to make those and they can often be copied from textbooks, the improvements were often minute and obvious (and patented).

        It was the equivalent of a compiled version of hello world or even a simple timer, it is technically possible with compiler optimizations to get the same

    • Re:Not purposeless (Score:4, Interesting)

      by thegarbz ( 1787294 ) on Wednesday April 17, 2024 @03:34AM (#64400480)

      These actually likely served a purpose.

      No they did not. To be clear what you describe does exist, but that is in the form of tiny (even by chip standards) serials or notes etched which look like something but are electrically inert. These are often virtually invisible on initial inspection.

      By comparison, these things here are big-arse clearly visible doodles often taking up all empty space on the silicon, and any company making a copy of this mask would easily see it and trivially remove it. Sometimes they are nonsensical. Sometimes inside jokes. Don't read into it more than what is in there. Engineers hide shit like this in their designs all the time.

  • My wife worked for TI in their now defunct chip fab in Lubbock, TX. They made, among other things, 16K dynamic ram chips. Apparently at one point they were given some Soviet RAM to study. The Soviet chips had both the TI logo and the Texas Tech mascot on the chip. Those chips were nowhere near an inch square -- even the packages were only about 0.75 x 0.3 inches.
  • by Anonymous Coward
  • by dslbrian ( 318993 ) on Tuesday April 16, 2024 @06:56PM (#64399772)

    When I was working in smaller analog ASICs we occasionally added pictures like these on the die. It sort of depends on the team and personality. In projects where the whole die was controlled by a small group (generally less than 10 people), you could do something like this. But recently working in teams where there are hundreds of people there are too many eyes scrutinizing every bit of space.

    In addition, long ago, back on lower-end process nodes (eg. 0.25um+) there was not as hard requirements on density and fill. So it was easier to find open space on the die. But newer deep-submicron processes (anything below 40nm) has very strict requirements on density and fill. Usually any open space is back-filled with fill shapes to prevent problems in fabrication (shapes that are adjacent to large open spaces do not process equally to ones that are surrounded). So unless a section of the die is explicitly sectioned off, open areas are rare now.

    Another thing that is very common is an area where you will see numbers/letters, usually a grid of them. What happens is each layer in the stack will get a letter or number such that they don't overlap each other. Later on if the die gets a mask update (this can happen if metal-changes are done to fix bugs/errors) then the layer identifier will get updated. So looking at the die you can identify which masks were used to make it. This is useful if you have multiple revisions of an otherwise identical product.

    In college I also fabricated my own die through MOSIS [themosisservice.com] for a research project (0.5um process IIRC). Of course when you control the whole die you can do anything you want, so I had to personalize it a bit.

    An interesting one I saw once was a Pentium4 (I think). I had a bare die embedded in a clear keychain. Under the microscope they had a whole block sectioned off with what appeared to be the initials of everyone who worked on it. I sort of doubt Intel does that sort of thing anymore.

    • by tlhIngan ( 30335 )

      It was way more up to the mid 90s or so to have these doodles - basically right when we started going from LSI to VLSI in designs. In LSI and early VLSI and before, chips were generally laid out by hand - hand drawn in mask (you might remember people saying Rubylith, which is a masking film so when it came time to do the photoreduction the rubylith would block light, but under normal light it was a transparent red so you could see what you're masking).

      As such, doing such doodles was relatively easy since yo

    • I still have one of those Intel keychains. I'll have to go back and take a closer look at it.

      Ah, MOSIS. That certainly brings back the memories. Back in the early 1990s I worked as the IT guy for the Electrical Engineering Department of a certain state university (to be left unnamed for reasons you'll understand here). We had just received our first student-designed chip fabricated by MOSIS, which came as several packaged ICs with what I recall to be a nice 8x10 photomicrograph of the die.

      Right in the middl

  • As a student at the design labs at Nortel and BNR we had our hands on some really nice tech. They spent heavily on building and integrating tools, so we had large heavy trackballs and big hires monochrome screens we had at the time was a big productivity booster. They spent big on it. Big pen plotters with 4 colours was pretty fun stuff too.. so we plotted alot of circuit diagrams of work in progress... you laid it out first then generated the Fortan code which was merged periodically with the main builds..
  • by Moof123 ( 1292134 ) on Tuesday April 16, 2024 @11:52PM (#64400196)

    I worked at Agilent doing MMIC’s in the early 2000’s, and just missed this era. As the story goes a German group made a logo of a beer stein with bubbles, using multiple mask layers to get lots of detail and 3D depth. Classy stuff. But all the little features created a lot of debris during liftoff in processing, and it crashed yield with a bunch of shorts. The management response was to ban all the logos en masse. You put down a library logo of an A inside a circle for copyright, and text from the library for chip ID, no more, no less.

    One of our conference rooms had picture from another old chip, of road kill. Zig zags on the top metal layer, a flattened critter on the first metal layer. It was the Dog Bob conference room, not entirely sure why.

  • These have been around for ages. I started working in semiconductor layout circa 1993. General Instrument was one player who had tons of these "doodles". Rumor was that it was so they could see which chips people were inspecting (for cracking) by the mention of the doodles.

    I/we (my team) at my company used to put them on chips until one bozo (hello Kurt...) put an lvsmask tag on his doodle which cause the LVS tool (layout vs. schematic) verification tool to ignore his doodle which was shorting the power

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