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Intel and Google Cloud Launch New Chip To Improve Data Center Performance (reuters.com) 17

Intel and Google Cloud on Tuesday said they have launched a co-designed chip that can make data centers more secure and efficient. From a report: The E2000 chip, code named Mount Evans, takes over the work of packaging data for networking from the expensive central processing units (CPU) that do the main computing. It also offers better security between different customers that may be sharing CPUs in the cloud, explained Google's vice president of engineering, Amin Vahdat. Chips are made up of basic processors called cores. There can be hundreds of cores on a chip and sometimes information can bleed between them. The E2000 creates secure routes to each core to prevent such a scenario. Companies are running increasingly complex algorithms, using progressively bigger data sets, at a time when the performance improvement of chips like CPUs is slowing down. Cloud companies are therefore looking for ways to make the data center itself more productive.
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Intel and Google Cloud Launch New Chip To Improve Data Center Performance

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  • Intel is not the company I would have picked for chip security.

  • pci-e X16 for one main link and it has it's own ipmi?

    Now does show to the base OS an network card?
    Can you do link bonding / fail over?

    Does the switches / routers need there own config?

    It this just an high end ver of the killer nic? but this time you need to be like having 80%+ main cpu load for this to show some speed up??

    • Another article basically said it's Intel's answer to Nvidia's bluefield, basically a second computer bundled with the nic, presumably running whatever is you like.

      The challenge is looking for a problem that this actually solves, that's worth the overhead. Style have suggested it can do software switching off of CPU for virtualization, but a modern CPU shrugs that off. People have mentioned security, but it's unclear why the nic is a particularly better place to enforce those policies versus either the sw

  • 4 pin aux power plug? and not pci-e gpu or 4 pin molex plug one?

  • by ColoradoAuthor ( 682295 ) on Tuesday October 11, 2022 @12:07PM (#62956941) Homepage
    Remember the IMP (Interface Message Processor) of yore? Put all of the message packaging into a separate processor between the computer and the Arpanet. Layers and layers of 1-bit state machines. Everything old is new again.
    • by GoTeam ( 5042081 )
      Except... Now with EXTREMELY secure routes to each core!!! (sorry, I wanted to make it sound cooler than it really is...)
    • (Part of) the idea of the IMP was that it took up a lot of precious resources on the mainframe to run the Internet networking stack, so let the IMP do it.

      Once you start talking about serious high performance networking (meaning 100Gbps connectivity to the host at least, now more likely 200 or 400Gbps using either 1 or 2 HDR), you're talking about requiring the transceiver and lower level software stack to process 12-50 gigabytes per second. That is a whole lot of cores kept busy even if you're doing noth
  • by JBMcB ( 73720 ) on Tuesday October 11, 2022 @03:40PM (#62957653)

    Looks like IT guys are slowly realizing why mainframes were such a good idea. This is how they worked - offloading all I/O processing to channel processors leaving the main CPU to do actual application and transaction processing. You can kinda-sorta do this by setting I/O affinity in some operating systems, but it's still not as performant as having dedicated channel IO.

    This is all stuff that only matters when you are dealing with absolute *tons* of I/O, which is what large user base web sites do. Simply decoding TCP/IP packets for thousands of simultaneous connections starts putting a drain on system resources.

    • by Shinobi ( 19308 )

      This was basically my take on it too. Now we're just waiting for checksumming and encryption from endpoint all the way through the chain to the CPU registers, transparent failover, including of individual memory sticks etc. All while the usual suspects say "the mainframe is dead". No matter that server processors and mainboards have been slowly going in the mainframe direction for more than 20 years now.

  • This seems quite familiar, like mainframe internal signal routing. Now I'm just waiting for them to integrate this into the mainboard chipset, do checksumming and encryption on all stages from endpoint to CPU registers, complete with redundant paths and transparent failover.

    Yet Google, Intel and all the other usual suspects harp about the mainframe being dead... :p

  • Look for a new Rowhammer 2.0 exploit coming to a CPU near you.
  • Unloved due to little difference from Win10 and its refusal to run on even some recent hardware, and now with PC sales dipping considerably there's not much happening in the OEM market for MS either.

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