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Google Open Source Hardware

Google's Plan to Make Chip Development More Like Open Source Software (googleblog.com) 41

Posted by EditorDavid from the join-us-now-and-share-the-hardware dept.
From Google's Open Source blog: The Google Hardware Toolchains team is launching a new developer portal, developers.google.com/silicon, to help the developer community get started with its Open MPW shuttle program.

This will allow anyone to submit open source integrated circuit designs to get manufactured at no-cost.

Since November 2020, when Skywater Technologies announced their partnership with Google to open source their Process Design Kit for the SKY130 process node, the Hardware Toolchains team here at Google has been on a journey to make building open silicon accessible to all developers. Having access to an open source and manufacturable PDK changes the status-quo in the custom silicon design industry and academia:

— Designers are now free to start their projects liberated from NDAs and usage restrictions

— Researchers are able to make their research reproducible by their fellow peers

— Open source EDA tools can integrate deeply with the manufacturing process

Together we've built a community of more than 3,000 members, where hardware designers and software developers alike, can all contribute in their own way to advance the state of the art of open silicon design....

We need to go beyond cramming more transistors into smaller areas and toward more efficient dedicated hardware accelerators. Given the recent global chip supply chain struggles, and the lead time for popular ICs sometimes going over a year, we need to do this by leveraging more of the existing global foundry capacity that provides access to older and proven process node technologies....

By combining open access to PDKs, and recent advancements in the development of open source ASIC toolchains like OpenROAD, OpenLane, and higher level synthesis toolchain like XLS, we are getting us one step closer to bringing software-like development methodology and fast iteration cycles to the silicon design world. Free and open source licensing, community collaboration, and fast iteration transformed the way we all develop software. We believe we are at the edge of a similar revolution for custom accelerator development, where hardware designers compete by building on each other's works rather than reinventing the wheel....

To help you on-board on future shuttles, we created a new developer portal that provides pointers to get started with the various tools of the open silicon ecosystem: so make sure to check out the portal and start your open silicon journey!
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Google's Plan to Make Chip Development More Like Open Source Software

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  • I think people are realizing we need to figure out how to do things without depending upon TSMC capacity which could easily go offline over war related to Taiwan. This is a massive threat to our global production supply chains.

    • Re: (Score:2)

      by Entrope ( 68843 )

      People have been wanting to figure that out for decades, mostly so that they have some way to compete with huge fabs for whatever is high-performance at the time. Current high-end fabs cost tens of billions of dollars, so it's hard to make a business out of running them for free. TSMC's competitors haven't figured out a good alternative yet. Photolithography equipment sellers would like to compete more effectively with ASML, but they haven't figured that out either.

      Even the huge fabs would like to make i

    • Re: (Score:3)

      by AmiMoJo ( 196126 )

      They won't be competing with TSMC on process. This is more a step up from FPGAs.

      It would really help if we had better open source tools for FPGAs. If you take a project like MiSTER, an open source "emulator" (I know it's not really...) for games consoles and computers based around an FPGA, you need proprietary tools to develop for it. The only FPGAs with open source support, from Lattice, are just not up to the task.

      • It would really help if we had better open source tools for FPGAs

        Indeed. Fortunately, the commercial tools really suck, so there is a good opportunity for an open-source alternative.

        I tried to download Intel/Altera Quartus to create a 30kB bitstream for a Cyclone-VI, and it needed EIGHTY GIGABYTES of disk space. It was the most pointlessly bloated software I have ever seen.

        • Re: (Score:2)

          by AmiMoJo ( 196126 )

          It's because Intel want to completely abstract the hardware so they have the freedom to change it as they like without breaking source code level compatibility. Say you want a clock, they provide a PLL module that is a black box. You tell it what goes in and what you want out, and it generates code for you. That means a massive code library for every part, and the module itself has to support a huge range of use cases and requirements in terms of things like jitter, accuracy, spread spectrum, pull-in and th

      • Re: (Score:2)

        by Gumpu ( 16052 )

        There are some people working on that: google F4PGA. They support the Xilinx-7 series in addition to lattice.

      • Interesting, I have not seen the term Gate Array since I worked at the semiconductor fab in the 80s.

      • Re: (Score:2)

        by lkcl ( 517947 )

        They won't be competing with TSMC on process. This is more a step up from FPGAs.

        It would really help if we had better open source tools for FPGAs. If you take a project like MiSTER, an open source "emulator" (I know it's not really...) for games consoles and computers based around an FPGA, you need proprietary tools to develop for it. The only FPGAs with open source support, from Lattice, are just not up to the task.

        * nextpnr-ecp5 (ECP5 25/45/85)
        * nextpnr-xilinx (xilinx a7/s7 35/50/100/200)
        * nextpnr-nexus (certus etc.)
        * nextpnr-ice40 (ice40)
        * symbiflow (xilinx a7/s7 35/50/100/200)

        they're all at different stages of maturity and development.

        l.

    • I thought i saw that TSMC is rapidy [theverge.com] diversifying [extremetech.com] fabs [datacenterdynamics.com] I'm sure they are aware of that dark cloud hanging over them.

  • Remember that when it's free you are the product (Score:3, Funny)

    by Mystra007 ( 1003560 ) on Sunday June 05, 2022 @09:11AM (#62594488)

    The real goal of Google is to open-source your private life....

  • OK... Intel how about proving you are really into "Open". Either remove or allow us to completely 100% disable Intel ME ? Then I would believe this.

    https://en.wikipedia.org/wiki/Intel_Management_Engine

    • Re: (Score:2)

      by jmccue ( 834797 )
      Crap :) I read Intel. This is google. Time for more caffeine. But if google is true to their word, then that would be great.

      • I like to examine how mistakes happen, in order to reduce frequency of errors. One of my favorite books is "the Design of Everyday Things", which is a an interesting study of how design increases or decreases error. (Such as door handles that are clearly made to be pushed, not pulled. And are sometimes used on the pull side of a door. Consider car door handles that can only be pulled.)

        Sometimes after a mistake leads to tragic consequences, we ask "want the hell were they thinking?" I like to try to actually

      • To be fair, Google could wind up doing the same ME bullshit. Either to create a backdoor for their analytics in every design, or the government. Then there's the possibility for DRM, and preventing "unauthorized" repairs / modifications / reuse to the design.

        In short, you may have misspoke, but you're still not that far off. What we really need is a bunch of companies to create IC manufacturing capacity to the point that it's impossible for one entity to backdoor / control all of them. Forget verification

        • Re: (Score:1)

          by Anonymous Coward

          To be fair, Google could wind up doing the same ME bullshit

          That isn't close to being fair, it's completely in the realm of making shit up to invent a physically impossible situation to irrationally hate google over.

          How the hell do you plan to backdoor a single AND gate? How about two AND gates?

          Now realize there are trillions of electronic circuits between a single transistor and something that resembles a microprocessor.

          Do you seriously believe a CPU management engine, requiring the entire infrastructure of a processor, can exist in a handful of transistors?
          Let al

  • MOSIS and CMP have been cheap for decades, but neither were free!

    Whatâ(TM)s the catch?

  • "Smart companies try to commoditize their products’ complements"

    https://www.joelonsoftware.com... [joelonsoftware.com]

    Hey, that post is younger than slashdot ...

  • Customized Analog IP has huge design and verification NRE costs. You don't crowd source something you only make once
  • That's what their real motivation is for this. Does it really matter if some of the silicon in a device is open-source if the overall product is for-profit? Not really. This way Google can get cutting-edge silicon without having to pay engineers to do it.
    • If you define cutting edge as circa 2000 then maybe. Google is enabling the education of people indirectly, particularly in Uni/College that otherwise requires industry work experience to see results. In addition there is the ability to test designs on a much lower cost and at a node which is significantly better then what most Uni labs would offer.

  • Why do they expect you to code in verilog?

    The 1990s called and asked for their HDL back.
    The rest of us use system verilog or VHDL.

    • "The rest of us use system verilog or VHDL."

      Speak for yourself. While I prefer Verilog, I would rather code in C in Xilinx Vivaldo than VHDL. VHDL feels like it was designed by the military bureaucracy - bloated and slow.

      "The 1990s called and asked for their HDL back."1745 called, they want their capacitors back. Wonder what you will replace them with? The lesson here being that any technology that you view as older than you still has a place in high tech.

      • >VHDL feels like it was designed by the military bureaucracy
        Actually it was, while Verilog feels like it was not so much designed as it just emerged as a mash up of the HDLs of the early 90s.

        System verilog was a huge improvement over Verilog though. It cleaned up the daft reg/wire thing. It put the ports in the port list of a module, not scattered in the body. It does arrays better, but still messy.

        After many years of designing chips with Verilog, VHDL and System Verilog, System Verilog feels like the be

  • If this becomes an ecosystem for RISC-V development, allowing that architecture to become commercially viable, it would certainly benefit Google.
    They'd have a customizable CPU they could use in Android phones and data centres, essentially the hardware equivalent of Linux.

  • Google has no interest in what is good for anything but shareholders. This is not an indictment of the company, it is simply the nature of all public companies. This is just a press release disguised as a benevolent technophilic ethic

  • https://opencores.org/ [opencores.org], anyone?

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