Please create an account to participate in the Slashdot moderation system

 



Forgot your password?
typodupeerror
×
Hardware

Samsung Wins 5-Nanometer Modem Chip Contract From Qualcomm (reuters.com) 18

Samsung Electronics semiconductor manufacturing division has won a contract to make new Qualcomm 5G chips using its most advanced chip-making technology, Reuters reported Tuesday, citing sources familiar with the matter said, boosting the Korean firm's efforts to gain market share against rival Taiwan Semiconductor Manufacturing. From the report: Samsung will fabricate at least some of Qualcomm's X60 modem chips, which will connect devices such as smart phones to 5G wireless data networks. The X60 will be made on Samsung's 5-nanometer process, the sources said, which makes the chips smaller and more power-efficient than previous generations. One of the sources said TSMC is also expected to fabricate 5-nanometer modems for Qualcomm. Samsung and Qualcomm declined to comment, and TSMC did not immediately respond to a request for comment. Best known among consumers for its phones and other electronic devices, Samsung is the world's second-biggest chip manufacturer through its foundry division, self-supplying many of its own mobile phone parts and also fabricating chips for outside customers such as IBM and Nvidia, among others.
This discussion has been archived. No new comments can be posted.

Samsung Wins 5-Nanometer Modem Chip Contract From Qualcomm

Comments Filter:
  • Are we running low on Nanometers, and need to cut down on their use, or is this an environmental thing where they don't want to waste them? Can't have too many Nanometers going into landfills.
    • The negative-nanometer tech should be really fast.

    • by dohzer ( 867770 )

      It's true that we are running out of nanometres, but scientists have been planning for a while now to replace them with ethically-sourced femtometres.

      • The universe is expanding, and thanks to dark energy, that expansion is accelerating. Nanometers are a renewable and self-replenishing resource.
    • by sinij ( 911942 )

      5-nanometer process

      My understanding that smaller fabs will consume less power. So the same chip using 5-nanometer fab will consume fraction of power of 22 nm chip everything else equal. For a cell modem, that is major source of power drain, this energy efficiency is a big deal.

      • by Anonymous Coward
        Node names are also a bit marketing wank; transistor gate pitches are still around 40-50nm, and haven't been shrinking particularly quickly (having seemingly hit a wall around 14nm, the last node for which there was a sizable drop in gate pitch). Progress is progress, however, so I'm not complaining.
  • Can anyone from the silicon industry comment on how these smaller feature sizes translate to run-time random failure rates like bit flips? Smaller features take less energy to upset don't they?

    As a counterexample I'm used to "radiation hardened" parts are often the same design just fabbed with larger features and packaging with shielding so they take more energy to switch.

    • by sinij ( 911942 )
      Is random bit flip is even an issue in context of cell modem? I know I have had far-gone Ethernet ports on switches that would still manage to transmit data because built-in protocol error correction and "try, try, and try again" approach leads to eventual successful transmission.
    • Not an expert, but there's probably a relationship between less energetic particles being able to flip bits vs. said particles being less likely to penetrate the housing of the chip. The probability of any single bit getting flipped is probably reduced in proportion to the density of features, but the probability of random bit flips seems like it would go up overall, with all else being equal. Would be interesting to see statistics on this.
      • If error rate is becoming a problem, increased density would allow for the overhead involved in error correcting coding for memory.
    • by Agripa ( 139780 )

      Can anyone from the silicon industry comment on how these smaller feature sizes translate to run-time random failure rates like bit flips? Smaller features take less energy to upset don't they?

      For radiation induced soft errors, it is about capture volume and charge. Smaller feature sizes require less charge to change state but less area means less volume to capture charge. So with DRAMs where charge was relatively constant as feature size decreased because of process improvements, radiation resistance stopped getting worse or even got better in the last few generations.

      So minimum feature size by itself does not relate very well to radiation induced soft error rate.

      As a counterexample I'm used to "radiation hardened" parts are often the same design just fabbed with larger features and packaging with shielding so they take more energy to switch.

      Radiation resistant features m

  • That's what /. told me. Only China innovates or knows anything about 5g. Must use Huawei if want 5g.
    • Huawei's 5G specialty is on the tower side. I'm not sure they manufacture any/many modems.

      • Haven't looked deeply into it, but a year ago, there was a story (related to Qualcomm antitrust case) on Samsung and Huawei both using primarily their own modems:
        https://www.reuters.com/article/us-qualcomm-tech/samsung-huawei-supply-majority-of-own-modem-chips-qualcomm-says-idUSKCN1OZ00F
  • Samsung's 5nm process is roughly equivalent (but a little bit denser than) to TSMC's latest 7nm process, or Intel's 10nm process, and is much less dense than TSMC's 5nm process. So... keep this in context.

Children begin by loving their parents. After a time they judge them. Rarely, if ever, do they forgive them. - Oscar Wilde

Working...