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Open Source Hardware

NLNet Funds Development of a Libre RISC-V 3D CPU (crowdsupply.com) 75

The NLNet Foundation is a non-profit supporting privacy, security, and the "open internet". Now the group has approved funding for the hybrid Libre RISC-V CPU/VPU/GPU, which will "pay for full-time engineering work to be carried out over the next year, and to pay for bounty-style tasks."

Long-time Slashdot reader lkcl explains why that's significant: High security software is irrelevant if the hardware is fundamentally compromised, for example with the Intel spying backdoor co-processor known as the Management Engine. The Libre RISCV SoC was begun as a way for users to regain trust and ownership of the hardware that they legitimately purchase.

This processor will be the first of its kind, as the first commercial SoC designed to give users the hardware and software source code of the 3D GPU, Video Decoder, main processor, boot process and the OS.

Shockingly, in the year 2019, whilst there are dozens of SoCs with full source code that are missing either a VPU or a GPU (such as the TI OMAP Series and Xilinx ZYNQ7000s), there does not exist a single commercial embedded SoC which has full source code for the bootloader, CPU, VPU and GPU. The iMX6 for example has etnaviv support for its GPU however the VPU is proprietary, and all of Rockchip and Allwinner's offerings use either MALI or PowerVR yet their VPUs have full source (reverse engineered in the case of Allwinner).

This processor, which will be quad core dual issue 800mhz RV64GC and capable of running full GNU/Linux SMP OSes, with 720p video playback and embedded level 25fps 3D performance in around 2.5 watts at 28nm, is designed to address that imbalance. Links and details on the Libre RISC-V SoC wiki.

The real question is: why is this project the only one of its kind, and why has no well funded existing Fabless Semiconductor Company tried something like this before? The benefits to businesses of having full source code are already well-known.

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NLNet Funds Development of a Libre RISC-V 3D CPU

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  • by WorBlux ( 1751716 ) on Sunday June 02, 2019 @12:09PM (#58695796)

    It was tried with the Vivaldi tablet, and one of the issues ran into was IP companies freaking out about and blacklisting open source developers. Open source driver developers can't be hired on projects that use the proprietary driver, and and licensing agreements for the proprietary driver and supporting libraries are revoked if the company releases a alternative driver with their product. That and the amount of people able and willing to install alternate firmware on an embedded device is low.

    • by WorBlux ( 1751716 ) on Sunday June 02, 2019 @12:11PM (#58695808)

      Plus the Linux kernel dev team is too chickenshit to actually enforce the GPL terms against people distributing binary-only drivers.

    • by Anonymous Coward

      They can either use the GC800 core using a one time 250k license, OR produce a whole open source GPU before the deadline capable of a minimum of 6GFLOPS of calculations.

      Based on what I'm reading they are targetting GL/GLES support, when I think the real solution is targetting a Vulkan 1.0 core with features designed to provide accelerated software emulation of any legacy features needed. Vulkan to OGL capabilities are already being produced for Mesa, so a Vulkan capable mobile GPU would provide maximal repr

      • by lkcl ( 517947 ) <lkcl@lkcl.net> on Sunday June 02, 2019 @02:56PM (#58696422) Homepage

        They can either use the GC800 core using a one time 250k license, OR produce a whole open source GPU before the deadline capable of a minimum of 6GFLOPS of calculations.

        Based on what I'm reading they are targetting GL/GLES support, when I think the real solution is targetting a Vulkan 1.0 core with features designed to provide accelerated software emulation of any legacy features needed. Vulkan to OGL capabilities are already being produced for Mesa, so a Vulkan capable mobile GPU would provide maximal reprogrammability, if the featureset can be fit into the fraction of a watt left for the GPU (It's a Dual core 64 bit RISC+single core GPU running in 2.5 Watts.

        It's only limited to dual issue on standard RV64GC.

        With Mitch Alsup being interested in the project (because I respect his expertise and have been implementing his ideas) he has taught me how to do n order multi issue.

        I was stunned to find that if the right infrastructure is in place,.multi issue is easy.

        The Vector Engine for the GPU and VPU are basically using multi issue to throw as many "elements" as possible at the parallel processing engine, reconstructing the order by maintaining a "Dependency Matrix". 6 months spent getting educated on that :)

        By subdividing the register file into Hi32 Lo32 we can DOUBLE the 32 bit FP issue compared to 64 bit performance (register ports are the main technical bottleneck and power sink)

        So the processor is extremely weird: 64 bit is dual issue, 32 bit is quad or possibly octa issue, and 16 bit FP will be octa or even 16 way issue. This in part because whilst it is a Vector Frontend, it is a transparent predicated SIMD (aka SIMT) engine at the backend.

        All of this will, yes, be behind the Vulkan API, however unlike most GPUs it will be run *from the user app*. Most GPUs have an IPC mechanism, we will be executing GPU instructions *directly* because the GPU *is* the CPU.

        The Vulkan driver is written in rust, however it is NOT an INTERPRETER (unlike gallium3d). It is a COMPILER that turns SPIRV directly into LLVM IR. That LLVM bytecode is handed over to a JIT compiler, and the 3D shader then runs as ASSEMBLY code, NOT as interpreted 3D commands. Performance should therefore be pretty good.

        Interestingly our first major milestone for the Vulkan engine is to run on standard x86, using the x86 LLVM IR. That helps us get a stable base so we can move to the SoC port, confident that the Vulkan engine works.

        Lots to do!

        • I am intreiged impressed, and terrified. Particularly in reference to speculative side channel attacks. I'll definitely be following the project. though.

  • Will they scale it to a 8-thread 4GHz version?
    • by lkcl ( 517947 )

      Will they scale it to a 8-thread 4GHz version?

      8 core 8 multi issue is not a problem as far as the design is concerned. 4ghz needs to be in 14nm or lower and needs very special attention paid to the number of gates that propagate between flipflops (pipeline stages).

      The cost in tine and NREs is just far too high... however the next version when we have customers etc and a stable husiness, effort can be put into doing that.

      Not before however. Walk first, run later.

  • Patents and IP.

    But good luck and have an IP lawyer on speed-dial.

    • by lkcl ( 517947 )

      Patents and IP.

      But good luck and have an IP lawyer on speed-dial.

      Funnily enough, the NLNet Foundation has precisely those resources available. Not on speed dial, on a mailing list.

    • If you're worried about patents, having a lawyer handy isn't the only route to take.

      Another is to design and build the thing now, and in 20 years you'll be able to use it.

      If you wait 5 years and then design and build the same thing, you'd still get sued over patents filed between now and then, because the system is so broken and "obvious" doesn't exist anymore.

      For hobbyists, whatever they build now we know we can build in 20 years. If we want to be allowed to have this in the future, somebody has to actuall

  • Most semiconductor SoC devvices have a single silicon supporting multiple SKUs. This means there is a significant amount of configuration of the device that needs to happen without allowing the customer to interfere. This configuration can be disabling parts of the hardware or limiting performance etc. This is done simply because it is expensive to make and verify a die, and it is better to accept a bit worse margins on the downrated parts than to make actual cost-down dies to meet those markets.

    While it wo

    • by lkcl ( 517947 ) <lkcl@lkcl.net> on Sunday June 02, 2019 @05:37PM (#58697068) Homepage

      by the customer. The code must be signed and running it must be enforced, otherwise the customer would be able to override the vendor configuration

      Sigh you are unfortunately quite well informed but not well informed enough, if that makes any sense.

      I have done a LOT of reverse engineering and work with embedded systems, and the key area that is a bitch is the DDR3/4 Memory Controller initialisation. This is usually kept proprietary for the incredibly simple and stupid reason that it is 3rd party licensed - no other reason.

      In the SiFive bootloader someone reverse engineered Cadence DRAM initialisation for the Denali PHY. A mere 200 entries in a table was all that was needed to be published. Utter pathetic insanity that a few numbers can be considered proprietary.

      Once the DRAM is up (the PLLs need to be programmed beforehand), a few GPIOs can be initialised, and that is enough to be able to talk to e.g Quad SPI, or NAND, or eMMC, or Sd/MMC, to get a larger bootloader into the DRAM, and, once executed, that can then start taking care of loading uboot or even a kexec capable linux kernel with an initramfs directly.

      There is absolutely nothing here that is either complex or needs to remain proprietary.

      The ONLY reason to use DRM is to chain-lock the user out of their own legitimately purchased device. The worst case of that I ever heard of was the first Surface Tablet, using an NVIDIA ARM core.

      Landfill.

      Users rejected it because you simply could not install your own apps, and despite running Windows it was an *ARM* cersion of Windows, using NVIDIA DRM to prevent and prohibit users from installing anything except what MICROSOFT said you can install.

      You get how that works? If you don't, look up the home system that google bought then remotely shut down.

  • Nobody wants slow socs that still might have large security holes, remember that some of the worst security leaks have been in opensource software, and weren't noticed for years (but were exploited for years). Also, you have to be very careful with designing 'opensource' hardware as you could run into patented stuff (you don't have the resources to actually check everything).

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