Micron Kicks Off Mass Production of 12Gb DRAM Chips (anandtech.com) 52
Micron is now producing its first LPDDR4X memory devices using its second-generation 10nm-class process technology. "The new memory devices offer standard LPDDR4X data transfer rates of up to 4.266 Gbps per pin and consumes less power than earlier LPDDR4 chips," reports AnandTech. From the report: Micron's LPDDR4X devices are made using the company's 1Y-nm fabrication tech and feature a 12 Gb capacity. The manufacturer says that its LPDDR4X memory chips consume 10% less power when compared to its LPDDR4-4266 products; this is because they feature a lower output driver voltage (I/O VDDQ), which the LPDDR4X standard reduces by 45%, from 1.1 V to 0.6 V. Micron's 12 Gb (1.5 GB) LPDDR4X devices feature a slightly lower capacity than competing 16 Gb (2 GB) LPDDR4X offerings, but they are also cheaper to manufacture. As a result, Micron can offer lower-cost quad-die 64-bit LPDDR4X-4266 packages with a 48 Gb (6 GB) capacity and a 34.1 GB/s bandwidth than some of its competitors.
Doubt it (Score:2)
Only when moved off DRAM will that be eliminated from the storing device.
That said, there is probably reasonable methods of forced address order limits implemented at the controller level that can make it near impossible to compromise. This will have likely have some surprise performance hits on certain addressing patterns though.
Roll on MRAM, I say.
Re: (Score:3)
Yes and no, the LPDDR4 JEDEC(rather than vanilla DDR4) has TTR to mitigate Rowhammer... but support in memory modules is optional.
Re: (Score:2)
Oops, meant TRR(targeted row refresh), not TTR. https://en.m.wikipedia.org/wik... [wikipedia.org]
By an amazing coincidence... (Score:1)
So did Jinhua Integrated Circuit Company. [nytimes.com]
What is "1Y-nm" ... here's an article (Score:5, Interesting)
As someone who worked in semi-conductor CAD, 1Y-nm confused me.
I found an article in EE Times that explains is using 19 nm to 10 nm as three nodes at 1X, 1Y, 1Z, with X, Y, and Z to be defined later.
Re:What is "1Y-nm" ... here's an article (Score:5, Informative)
https://www.eetimes.com/docume... [eetimes.com]
Re: (Score:1)
they mean the x and y have scaled down so the new process is 0.4 x 0.5 y, but only 0.9 z , so it didnt scale linearly like older processes 1-1
7 nm as defined by marketting is only describing the smallest feature, rather then the average size of the node ... i dont believe the processes ever scaled linearly, but is now more disjoint ..... as the taper from the print feature will define the spacing between the elements
Re: (Score:2)
Far too many postulates! And ridiculous/meaningless ones at that.
Comment removed (Score:4, Funny)
Re:Sounds interesting but... (Score:4, Funny)
I'm rather partial to the LPXDRWTFBBQ product family.
Re: (Score:3)
people settling for only DOUBLE data rate (DDR,) we should hold out at least for triple data rate (TDR)
That doesn't make any sense. DDR sends data on both the rising and falling edge of the clock. TDR would have no clock edge to sync the data, so it wouldn't work. If you want more data, then either increase the clock rate, or widen the bus.
It is possible that the TDR comment was a joke, and I have been whooshed, in which case I apologize for being a humor-impaired Aspie.
Re: (Score:2)
It doesn't make sense right now, but we don't know what the future holds.
We're talking clock synchronisation. The future definitely doesn't hold Triple anything in that regard. If you come up with a novel way of increasing data rate then for the love of god don't call it anything remotely related to DDR which has a very specific technical meaning.
The clock is only used for synchronization anyway so it isn't really needed to always send the clock. USB for example relies on both units clocks being "close enough".
USB devices which have two "clocks" either have problems or have synchronisation delays. The actual frequency of a USB signal differing from expected is a source of problems for many USB devices which rely on time sensitive signalling.
Re: (Score:2)
That frequency is extracted from the data lines a trick that works just fine at USB speeds, and then utterly fails at the type of speeds we expect RAM chips to use.
LPDDR4X: 4.266 Gbps per pin.
USB 3.0: 5 Gbps per pin.
Re: (Score:2)
USB 3.0 single device controller at one end of a SERIAL line.
LPDDR4X: Multiple chips need to talk simultaneously sending multiple lines of data at the end of a PARALLEL line without controllers without anything in the way.
Bandwidth of a USB3.2 device (I'll be nice since you're comparing old technology vs new): 20Gbps
Bandwidth of a stick of LPDDR4X: 273Gbps (but the memory controller is capable of 546Gbps in dual channel)
Now an additional reality check: USB3.2: Controllers both side of the bus. The latency f
Re: (Score:2)
.... or you send more than one bit per wire, with like four voltage levels, as already done by some pin-limited chips.
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I think it was in jest, however possibly if you offset adjacent lines 120 degrees, like the phases in a 208 V line, you could get something resembling triple data rate, or at least something that sounded good in marketing. Of course, this triple line data rate memory would be called TLDR.
DDR4-4266 Speeds? (Score:1)
Why can't we get those kind of speeds for DDR4-4266 PC DIMMs? Those are almost impossible to get and then at insane prices.If RAM companies produce this kind of RAM normally, which isn't even specified by JEDEC, so they have to make it cheaper than the competition, then why are there no such DIMMs available?
https://pcpartpicker.com/produ... [pcpartpicker.com] shows there is basically none from Crucial/Micron. Gamers and generally Ryzen owners would pay lots of money for it. Heck, even good and expensive Crucial DDR4-3200 has
Re:DDR4-4266 Speeds? (Score:5, Informative)
This is LPDDR; Intel and AMD don’t support it. Intel announced support in CannonLake that was supposed to ship in 2016... and still isn’t available to consumers.
LPDDR4 has been standard on ARM devices(phones/tablets) for quite a few years.
4266 is the highest rated LPDDR4 chips in the LPDDR4 spec. Even the Galaxy S9 only uses LPDDR4-3732 (1866MHz). https://www.qualcomm.com/produ... [qualcomm.com]
Maybe Apple’s new iPads use LPDDR-4266.
Is that 12 Gb or GB or Gib or GiB? (Score:1)