Own An Open Source RISC-V Microcontroller (crowdsupply.com) 101
"Did you ever think it would be great if hardware was open to the transistor level, not just the chip level?" writes hamster_nz, pointing to a new Crowd Supply campaign for the OnChip Open-V microcontroller, "a completely free (as in freedom) and open source 32-bit microcontroller based on the RISC-V architecture." hamster_nz writes:
With a completely open instruction-set architecture and no license fees for the CPU design, the RISC-V architecture is well positioned to take the crown as the 'go to' design for anybody needing a 32-bit in their silicon, and Open-V are crowd-sourcing their funding for an initial manufacturing run of 70,000 chips, offering options from a single chip to a seat in the design review process. This project is shaping up to be a milestone for the coming Open Source Silicon revolution, and they are literally offering a seat at the table. Even if you don't end up backing the project, it makes for very interesting reading.
Their crowdfunding page argues "If you love hacking on embedded controllers, breaking down closed-source barriers, having the freedom to learn how things work even down to the transistor level, or have dreamed of spinning your own silicon, then this campaign is for you."
Their crowdfunding page argues "If you love hacking on embedded controllers, breaking down closed-source barriers, having the freedom to learn how things work even down to the transistor level, or have dreamed of spinning your own silicon, then this campaign is for you."
EditorDavid (Score:5, Insightful)
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No, like the idea that the fact that global warming is occurring means that people must vote for corrupt politicians that want to waste trillions on ineffective and harmful policies.
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What exactly happened here? Suddenly, we have stopped discussing the latest adventures of Trump, Clinton, fake news, Jill Stein and are suddenly discussing things like microcontroller HDLs? I thought that those things were germane to this site 4 years ago, if not more
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Sad for you if you don't understand that politics affects technology.
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Sad for you if you don't understand that politics affects technology.
So does constipation, and Swifties clogging the pipes. We need more plunger stories like this.
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At least that's what those who are panicking are thinking hence all the articles. Who the fuck knows what Trump is going to try.
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leftist propaganda posts
On /.? As a European, let me say "hahaha".
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the RISC-V architecture is well positioned to take the crown as the 'go to' design for anybody needing a 32-bit in their silicon
In whose reality is that going to happen? You've got entire industry branches that exist around building and supporting long-established 32-bit architectures, anything you want from any vendor, and we're supposed to believe that a proof-of-concept run of a handful of CPUs with little to no widespread acceptance and support is now the way to go? I mean, good on them for doing it, it's a cool project, but lets be realistic about how its going to play out.
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Still, we need more than what the Open Hardware movement can offer to us in FOSH (Free and Open Source Hardware) products. We also need to be able to DIY them, and therefore we need to have access to the right tools so we can create (or, as an option, order) the chips by ourselves ;) Also, we need a tool to (that is easy to) design the chips too, so we can build them later :D
But, at a start, this action is a very good one...
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. We also need to be able to DIY them, and therefore we need to have access to the right tools so we can create (or, as an option, order) the chips by ourselves ;) Also, we need a tool to (that is easy to) design the chips too, so we can build them later :D
But, at a start, this action is a very good one...
SiFive is working on this exact problem--to let DIYs get access to real, packaged, custom silicon based on either your specification or with your RTL. Stay tuned for some announcements coming up at next weeks (11/29) RISC-V workshop.
Re:FPGA (Score:5, Interesting)
I think you mean the bitstream. Gate-array designs, including the design of this chip, are generally coded at a higher level than a single transistor. One can then compile them to the transistor level as part of the preparation for using a fab to create a chip rather than a gate-array program.
Actually, we would like an Open Hardware gate array. A big problem currently facing us is that the tool chain can't be entirely Open Source because gate-array manufacturers treat their bitstream format as trade-secret. So, we need an open bitstream.
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having an open "gate array" or FPGA with fully diclosed bistream would be really relevant. morover it could have a RISC-V hard core side by side.
actually there's anyway a reverse engineering effort of the bitstream for the iCE40 Lattice smaller FPGA (up to 8K LUT), it's project icStorm
http://www.clifford.at/icestor... [clifford.at]
together with arachne-pnr and yosys, you could put in place a fully open source pipeline to program those little rascals, from Verilog to bitstream.
this cold be also the starting path toward a
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That's the project's main complication other than the actual hardware design. We know lots of gate-array patents are expired, it's been long enough. But the particular features modern developers are used to - for example a particular flavor of LUT or matrix of gates, or a way of programming the device, might still be under patents. So we'd have to do a patent study to inform the design.
It's still a great project to do and
Re:FPGA (Score:4, Informative)
If you want hardware open to the transistor level and not just the microcode level ...
Like most RISC processors, RISC-V doesn't use microcode. Microcode is a CISC thing.
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So, I was going to make a crack that it's a RISC instruction set, so there's not really that much to open, is there?
How's the compiler support - got a decent gcc optimizer for it yet?
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The optimiser is largely irrelevant, as most optimisations are target independent these days. RISC-V support in GCC and LLVM is currently undergoing upstreaming, but it's a bit slow because the ABI has changed a couple of times. For a microcontroller it's probably fine: the privileged mode part of the spec is still not quite final, so I wouldn't recommend it yet for anything that you might want to run an OS on.
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-1, misinformative
RISC-V is an ISA only. It does not oblige implementations to follow any particular microarchitecture.
The religious wars between CISC and RISC were given up decades ago in favor of data-driven architectural decisions. If using sequenced uops solves the problem, they'll be used. For example, here the Cortex-A57 Software Optimization Guide explicitly refers to uops starting in section 2.1: http://infocenter.arm.com/help... [arm.com]
In the future there won't be any CISC or RISC, just wankers.
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why bother with an actual chip? there are plenty of open source microcontrollers you can use today with any number of FPGAs.
Cost and performance usually.
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Last time an FPGA design was getting me down, it was due to power consumption issues. We could get 4x the battery life with an ARM design as compared to the on-FPGA NEON processor cores we were using.
FPGA was super flexible, but what we really needed was a couple of ARMs and a tiny bit of programmable silicon for the actual custom bits.
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overpriced. (Score:5, Insightful)
I love RISC-V, I really do but $50 for a chip in bad package is too much. Who can hand solder QFN chips?! $20 is really my limit for a chip of that caliber and it would need to at least be in a QFP package.
The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.
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The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.
If you're into this stuff, you probably already have a suitable FPGA board that gets closer to 160 than 50 MHz.
Re:overpriced. (Score:5, Informative)
Who can hand solder QFN chips?!
Get a tube of solder paste (good old PbSn, not RoHS) and a $29 toaster oven from Walmart for reflow.
Pro-tip: Use a different toaster oven for grilled cheese sandwiches.
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Or just get some skills. I hand soldered several QFN chips with an incredibly small pitch during my thesis. Simple tips:
- Use very liberal amounts of flux.
- Ensure the solder mask gives you enough space to place your iron, the solder will wick up to the pins.
- Solder down 2 opposite pins
- Check that all pins line up after soldering down the first 2.
- Check them again.
- No seriously did you check them? Use a magnifying glass or a microscope. This is your last chance before you royally screw things up.
- Use t
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Eh?
$50 for a first run chip, which they're billing as a collectable.
Looking at the other tiers that have the dev board, the per-chip price ranges from $3 and $10. Which still seems a bit high (I think the STM32's are around $1 each), but it's nothing like $50.
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I love RISC-V, I really do but $50 for a chip in bad package is too much. Who can hand solder QFN chips?! $20 is really my limit for a chip of that caliber and it would need to at least be in a QFP package.
The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.
As is 640k obviously.
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Who can hand solder QFN chips?!
Who can't? FFS, they're one of the easiest packages to solder. Grab a firestick and practice...
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QFNs aren't that hard to solder. They've got lands up the side, so you can even do them with a normal soldering iron. I've never tried that personally, but I've watched others do it. The technique is similar to the blob and suck medhod of doing fine pitch leaded packages. I have however reworked and replaced DFNs and small LGAs with one of those cheapie 852D air guns off ebay. And I've also soldered them with a $10 stencil and a basic reflow oven.
I hear other people use a cheap toaster oven rather than spen
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Contrast with just picking up a license from ARM
One of the reasons RISC-V exists is that this is quite difficult. It can take two years to negotiate a license with ARM. The ARM licenses can also eat up a lot of your profit. Micron is one of the RISC-V backers because the licenses for the ARM cores on their SSDs eat a very noticeable proportion of the per-unit profit.
What a strange timeline we're on. (Score:2)
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Your view is wrong. Hardware has only gotten more closed with time.
It used to be the case that the computer you bought came with schematics and a document describing how to program the thing to do whatever you wanted. Now, you're lucky if you can get someone in the depths of a block-box corporation even to acknowledge that there's a bug in the software or hardware.
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"It used to be the case that the computer you bought came with schematics and"
This is just as wrong. Insofar as the percentage of the population that bought these computers was vanishingly small, instead of ubiquitously large. Apples and Oranges. Different day and age and world. There was never a time that ordinary people purchases such things. It's a nice fantasy though, I'll give you that.
Plenty of ordinary people bought the original IBM PCs and PC/ATs. They didn't come standard with the schematics, but you could buy technical reference manuals from IBM which included both the schematics and the BIOS source code for the systems.
Maybe few end-users made use of the available info, but it did ensure that 3rd parties could create a large ecosystem of compatible software, accessories and even competing computer systems. This greatly benefited the end users, whether they cared to dig into the unde
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Well... I'm sure you can buy them today too. It matters a lot what the pricetag is however. And even if you quote me an affordable number from the 80's, I still contend that was for a vanishingly small percentage of the population at large. Compared to probably multiple more powerful devices owned at less than 1/10th the price
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What do you need schematics for a MacBook for though? It made sense back in the days when everything was written in ASM and ran on the bare metal, but now? How is a schematic going to make your latest hipster iOS app any better?
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I had PC schematics, and BIOS listings. I am fairly sure I had Schematics for the Intel 8080 development system, two different 6502 development systems, and a 16 bit National Semis development system which we used as a word processor.
Bill Gates is personally
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Apples and Ataris - they had schematics, but the really interesting bits, graphics and sound processors, were still closed source, proprietary, and a little buggy in the first couple of generations.
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I used Atari ST Internals to code a horizontal smooth scrolling display, it was buggy - flickery on my 800 that I coded it on, but when the GTIA II came out in the 1200 the same code ran perfectly. I don't think there was ever any publication about that, other than, yeah, the GTIA I had some bugs.
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By the time I got my ST I didn't have trouble like that but I bow to your experience with those earlier buggy chips I didn't see.
Garage chip (Score:2)
This will get really fun the day someone manages to make an CPU on his own garage.
I hope this person documents it on the net with videos etc..
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This will get really fun the day someone manages to make an CPU on his own garage.
Might be hard with the birds landing in the middle of the clean room. :-)
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If I had the time and money, I could make a pneumatic version of the PDP8 in a garage (live in London, and cannot currently afford a garage). It would be about the same size as a PDP8/S and might even go as fast! (Using 8E architecture). Read/write paper tape only - no pneumatic TU56's!
PDP8 architecture was open source. I think the PDP11/20 was too. I believe Sparc is also open source, even Sparc64, although actual processors like Sun/Oracle/Fujitsu's are not becaus
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This will get really fun the day someone manages to make an CPU on his own garage.
That day is in the past, not the future. Some early cpus were taped out, etched, and metallized by hand. Today, you need nano-scale photolithography and a multi-billion dollar fab. You can load this CPU into an FPGA, but if you want it directly in silicon, you ain't gonna do that in no garage.
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This will get really fun the day someone manages to make an CPU on his own garage.
That day is in the past, not the future. Some early cpus were taped out, etched, and metallized by hand. Today, you need nano-scale photolithography and a multi-billion dollar fab. You can load this CPU into an FPGA, but if you want it directly in silicon, you ain't gonna do that in no garage.
Today, you need to set your expectations and hopes realistically. If it could be done in the past, it can be done today. You will just have to have expectations of utility more in line with what the folks in the past had, rather than what you might wish for with knowledge of today's commercial tech.
Set your sights towards a raspberry pi or less, not towards modern high performance products. At least for the start. It may well be that once you get the thin end of the wedge / foot in the door, you can s
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A raspberry pi or less lol you really have absolutely no idea do you. A Raspberry Pi CPU is hundreds of times more complex than what you could etch out in your garage.
Call it a 'trumpesque quasi troll'. Realistically I would expect it to be several years before a workable Atari-400 level analog was readily accessible. Multiple aspects of this problem can be worked on in parallel, so during the years that the physical processes are being developed (and coming down in price in various ways due to various innovations and evolutions of existing tech) to get to the A400 level, whatever hurdles would then be encountered subsequently scaling up to the firstgen rpi could have
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You can fully simulate a 6502 (running full speed) in your phone... who really cares if you can dig the minerals from the earth, grow your own silicon wafers and do lithography in your garage or not? I mean, if you set your mind to it and had a couple of million to blow, I'm sure it's possible in a less than 1000 square foot space, but you'd be better off acquiring used foundry gear and buying components from suppliers, like the real chip fabs do. And then, what's the point? Are you going to make anythin
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There is no innovation or evolution in tech that is going to let you fab a 6502 in your garage. Ever.
You sound confident in your long term prediction. Time will tell.
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Today, you need to set your expectations and hopes realistically ... a raspberry pi or less
A Raspberry Pi has more transistors than a top end 1980s supercomputer. It is a million times more complex than anything you could ever hope to etch in a garage. Maybe you could do a 4004 (~2000 transistors) with tape and etchant, but a Raspberry Pi has billions.
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Didn't they make 4004s with tape and etchant at the "real" factory?
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True - it was a guided missile chip - small was a virtue.
I'd bet that by now, some sod somewhere has put together a 4004 with discrete transistors on breadboards.
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One thing I'm wondering about RISC-V - I can see the motivation behind a new ISA - making it a FOSH platform, but from a market acceptance POV, who will write code for, or adapt a platform based on a brand new ISA, when there is x86/x64, ARM, SPARC, MIPS and Power. Even Itanium, for anyone who's still into VLIW (even though Itanium 3 is more RISC than VLIW). Maybe the FSF/Libre crowd could build for this - maybe port Libre Linux or Minix to the platform.
Another thing I wonder - in the 90s, Sun contempla
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The difference between a fairy tale ... (Score:4, Informative)
... and a sea story:
A fairy tale starts with, "Once upon a time ... "
A sea story; "Hey, this ain't no shit ... "
So, this ain't no shit:
When I trained on electronics in this man's Navy in 1965, I went to NAS Memphis and we worked on a vacuum tube computer that filled up a whole wall. We'd open the windows in the winter because it was HOT in there.
There were two tubes per flip-flop module. The tubes burned out often and we'd have to troubleshoot that.
Our goal was to use a row of toggle switches to turn lights "on" for a binary one, and "off" for a binary zero.
We would load up one register with four bits and the only other register with four bits and then we'd press a switch that could only execute an add and we'd better get the right binary number on the third row of lights.
We started (I shit you not) all of our algebra, trig, geometry, etc. including square root extraction by pencil and paper and then moved into the slide rule age.
The only goddam transistors we saw were the 9-volt radios playing Elvis.
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So, could the guys on the tube computer get a firing solution any faster, or more accurately, than the guys with the slide rules?
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No firing solutions by any means.
We were avionics, not ordinance.
The tube "computer" added two 4-bit numbers.
That was it.
--
The first real computer I saw was the Jezebel made by Magnavox to hunt submarines. $250,000 with one aboard a Grumman twin prop job off a carrier and two installed in P3 Orions (of hurricane fame).
It had a ferrite core, little iron rings with two wire going through them. When the current went one way, the magnetic field was a "one" and when the current through another wire, the core was
Not Harvard architecture? (Score:3)
The high speed is because they currently don't have any on-chip flash (flash being slower to access than SRAM, and typically being what slows 32-bit microcontrollers down). That means this isn't a single-chip solution like most microcontrollers, though they are working on changing that.
Instead of flash, they store their program in the same SRAM used to store data (which makes that 8 kB of SRAM a lot more limiting than it would be on a Cortex M0 with the same amount of SRAM plus 16-256 kB flash). Most microcontrollers use a Harvard architecture with separate program and data memory, allowing instructions to be fetched from flash while performing reads from and writes to SRAM. If they don't do this, I wonder what sort of performance they'll see when they have to make regular reads from a slow flash memory in between SRAM accesses. Or will they just load the entire program into SRAM? That's not going to be ideal in terms of power consumption, requiring a much bigger memory array than they'd otherwise use, something that's going to get worse as they try to compete with larger microcontrollers.
Also, the Harvard architecture has some advantages in security: things can be set up so a very specific sequence of actions has to be performed to enable writing to program memory. With IoT devices, this sort of thing is becoming more important...not an issue at present, with their 8 kB memory, but something to consider when thinking about this thing's future.
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It runs at 160 MHz. Processors that run directly from flash are much slower (around 32-48 MHz...ST's Cortex M0 processors run at 48 MHz). The only flash-based processors that run at comparable speeds do so with complex hardware to read instructions ahead of time in large chunks, storing them in SRAM until the processor requests them (ST's ART Accelerator, for example)...which can result in difficult to predict variations in execution speed when branches result in the needed code being something other than w
my previous bookmark on open source RISC-V (Score:2)
Analyzing the RISC-V Instruction Set Architecture [adapteva.com] â" Andreas Olofsson, August 2014