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IBM Hardware Technology

IBM Reports Carbon Nanotube Chip Breakthrough 73

First time accepted submitter yawaramin writes "IBM has apparently made a breakthrough in arranging carbon nanotubes into the logic gates necessary to make a chip. This should help miniaturize and speed up processors beyond what today's silicon-based technologies are capable of. The article notes though that perfecting the carbon nanotube technology could take up the rest of this decade."
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IBM Reports Carbon Nanotube Chip Breakthrough

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  • How refreshing (Score:5, Informative)

    by scdeimos ( 632778 ) on Monday October 29, 2012 @05:30AM (#41802245)
    Most stories I see say that [insert favourite research here] will be ready for commercial production within five years. Finally, somebody's being honest and saying it won't be ready before the end of this decade.
    • Re:How refreshing (Score:5, Insightful)

      by AbRASiON ( 589899 ) * on Monday October 29, 2012 @07:02AM (#41802539) Journal

      Moderate you up or just type I agree? Too important to just mod, you're bang on point. After using the internet for over 15 years, definitely this is the case with tech articles. I think you could probably count the technological _huge_ leaps in the last 20 years on a single hand in regards to PC parts.

      3D GPU stuff like 3DFX cards
      Ability to burn optical media
      High speed internet
      Flat panel displays

      As for CPU speed increases, memory size increases, memory bandwidth increases, disk storage size increases - ALL of these have been slowly eeked out at a slow pace to keep the money flowing.

      • by Nadaka ( 224565 )

        SSD's are not revolutionary. They are older than spinning magnetic disks, it just took them a lot longer to increase in speed and capacity compared to the first few generations of magnetic disks.

      • ... in the last 20 years ...

        Ability to burn optical media

        Sorry, but this didn't happen in the last 20 years. I bought my first CD-R writer in the fall of 1991 (21 years ago), and I think that they were on the market for about a year before that. If I recall correctly, the price was just under $8000.

      • Most of what you list is incremental. SSD over HD, really? Then why not mention SATA over ATA?

        And how is a flat panel display a "huge" technological leap? Especially with LCD latency issues, LCD looks more like a downgrade, albeit a cheaper than CRT one.

        "Ability to burn optical media" is as revolutionary as "buggy whip manufacture". I burn, on average, a disk or two per YEAR. At least you could have gone for USB thumb drives.

        "High speed internet" is so "huge" a leap, it is not even needed for th

        • by Dog-Cow ( 21281 )

          You aren't really logical at all. SSD and HD (as in spinning media) are different technologies, with the former allowing for much greater speeds of data access. SATA vs ATA [sic] is just a change in interface. Both SSD and HDD can use the either, though I am not aware of any SSDs using (P)ATA.

          LCD panels allow for smaller displays. They use less energy. You can fit one anywhere. Today's phones have better resolution than the desktop of 10 years ago. Try that with a CRT.

          Being able to burn optical media

          • by Mashdar ( 876825 )

            I don't know. SATA vs ATA seems analagous to SSD vs HDD to me...

            • *In a black box, both pairs are roughly identical (in fact, SATA requires more adaptation from ATA than SSD from HDD),
            • *Both SATA and SSD are faster and fancier than their 1990s era brethren,
            • *SATA and SSD are really modern incarnations of much older technology coming back into vogue,
            • *And most importantly, SATA and SSD both begin with the letter S (crucial).

            (PS I don't know why you wrote sic after ATA, since ATA was its original name.)

      • 3D GPU stuff like 3DFX cards

        No. There was nothing revolutionary about this. The progress was slow-and-steady like everything else.

        You could already do fully-featured real-time 3D rendering for years before 3DFX cards were even conceived, and the price came down iteratively.

        At first the only source for real-time 3D was government contractors with supercomputers. But this performance had a price (usually a million+)

        Then the cost was reduced to the "thousands of dollars" over the next few years for arcades

    • Most stories I see say that [insert favourite research here] will be ready for commercial production within five years. Finally, somebody's being honest and saying it won't be ready before the end of this decade.

      Which is a shame, because we will need those powerful computers to crack the secret to controlled nuclear fusion, which, *after* getting those computers, will only be twenty years away!

    • My impression is that the "5 years" can be read "It's not available right now, there are some other barriers to this being marketed that I don't work on, it's anyone's guess as to how long that will take, but everyone will keep asking us how long until it's available unless we throw out a number so five is close enough to let you know you should remain interested but not so close that you'll expect it next year."

      It's the marketing types, the reporters, and the audience of the news that demand the 5 year
  • for the wife. Now she can vacuum and have some logic. Assuming the tube is large enough.
  • by aheath ( 628369 ) * <> on Monday October 29, 2012 @05:36AM (#41802265)
    The IBM research paper is available at [] The paper is protected by a paywall.

    The IBM press release is available at []

    I recommend reading the comments on the New York Times article. My favorite comment so far is:

    MC - NYC
    The Singularity edges closer...
    • Re: (Score:3, Funny)

      by Anonymous Coward
      Can't wait for marketing to get involved, changing high-density carbon nanotube transistors (CNTs) into carbon ultra-nanotube transistors.
      • by aheath ( 628369 ) *
        IBM marketing will never approve a 4 letter acronym when a 3 letter acronym will suffice. ( Deadpan humor mode set on full. )
    • by Anonymous Coward on Monday October 29, 2012 @05:55AM (#41802339)

      article text:
      Carbon nanotubes have potential in the development of high-
      speed and power-efficient logic applications1–7. However, for
      such technologies to be viable, a high density of semiconduct-
      ing nanotubes must be placed at precise locations on a sub-
      strate. Here, we show that ion-exchange chemistry can be
      used to fabricate arrays of individually positioned carbon nano-
      tubes with a density as high as 1 3 109cm22—two orders of
      magnitude higher than previous reports8,9. With this approach,
      we assembled a high density of carbon-nanotube transistors in
      a conventional semiconductor fabrication line and then electri-
      cally tested more than 10,000 devices in a single chip. The
      ability to characterize such large distributions of nanotube
      devices is crucial for analysing transistor performance, yield
      and semiconducting nanotube purity.
      The precise placement of carbon nanotubes on a substrate typi-
      cally involves one of three techniques: the direct growth of nano-
      tubes on a substrate10,11, the transfer of nanotubes from a ‘growth’
      substrate to a device substrate5,6, or the deposition of nanotubes
      from solution onto a device substrate8,9,12–18. Because nanotubes
      can be metallic or semiconducting, a further consideration for
      high-performance digital logic is the degree to which metallic nano-
      tubes can be eliminated. Although approaches for enriching sub-
      strate-supported semiconducting nanotubes during or after
      synthesis have been demonstrated19,20, currently the most effective
      techniques involve processing the nanotubes in solution21.
      One promising approach for placing solution-based nanotubes is
      to selectively position them on a specific substrate by chemically
      functionalizing the nanotubes or the substrate14–18. This typically
      involves using a patterned surface (such as SiO2/HfO2) such that
      nanotubes deposited from solution adhere only to one part of the
      pattern (the HfO2, for example). Key metrics for determining
      the efficacy of the deposition are the density of individually
      placed nanotubes, which must exceed 1 × 1010cm22, with a pitch
      smaller than 10 nm for high-performance logic6,7, and the selectiv-
      ity, which is the degree to which adsorption takes place only on the
      pattern of interest. In general, however, solution-based approaches
      that result in high density exhibit poor selectivity14,16, and those
      that offer high selectivity have low density17,18.
      We have developed a selective placement method based on ion
      exchange between a functional surface monolayer and surfactant-
      wrapped carbon nanotubes in aqueous solution. Strong electrostatic
      interaction between the surface monolayer and the nanotube surfac-
      tant leads to the placement of individual nanotubes with excellent
      selectivity and a density of 1 × 109cm22. Furthermore, the
      approach is compatible with the most efficient solution-based sep-
      aration schemes21, allowing wafer-scale integration using highly
      purified carbon nanotubes.
      Our nanotube placement using an ion-exchange technique
      is illustrated in Fig. 1a. The surface monolayer is formed from
      4-(N-hydroxycarboxamido)-1-methylpyridinium iodide (NMPI)
      molecules, which were synthesized from commercially available
      methyl isonicotinate (see Methods). The monolayer contains a
      hydroxamic acid end group that is known to self-assemble on
      metal oxide surfaces, but not on SiO2(refs17,18,22). We selectively
      self-assembled NMPI on HfO2regions of a patterned SiO2/HfO2
      surface. The functionalized surface was then placed in an aqueous
      solution of carbon nanotubes. Solubility of the nanotubes was
      achieved using an anionic surfactant (sodium dodecyl sulphate,
      SDS). Excess surfactant in the solution was removed by dialysis.
      The anion of NMPI (that is, iodide) is exchanged with the
      anionic surfactant wrapped around the nanotubes, leading to a
      strong coulombic attraction between the negatively ch

      • Thank you!

        I don't know how many times I've wanted to read a paper mentioned here that's essentially unavailable.

        I think your method of cut/paste the text strikes a good compromise between giving out the information and preventing unauthorized copy. The information is available to motivated readers, but can't easily dilute the journal's copyright. A truly interested reader could then pay for the actual article from the Journal.

        Keep up the good work, whoever you are.

        • I think your method of cut/paste the text strikes a good compromise between giving out the information and preventing unauthorized copy.

          You seriously don't think that copying and pasting the whole text of a work constitutes copyright infringement?

          I'm not a fan of paywalls for research papers, but you can't just magic them away.

  • Ars Technica (Score:5, Informative)

    by tsa ( 15680 ) on Monday October 29, 2012 @06:22AM (#41802421) Homepage

    Ars also has a piece on this, here. []

  • by Anonymous Coward

    of interconnected tubes

  • by epine ( 68316 ) on Monday October 29, 2012 @07:32AM (#41802649)

    A failure to increase performance would inevitably stall a growing array of industries that have fed off the falling cost of computer chips.

    Actually, no. Micro-architecture could continue to evolve without die shrinks (likely toward a proliferation of specialized units) and software could also evolve. Probably both for a decade or so, before the shrink stall becomes a fed stall. A feature of Moore's Law rarely expressed is that software lags architecture, and architecture lags die size.

    I realized a long time ago that if I could gain a 50% speed increase by rewriting a critical application loop in assembly language, it generally wasn't worth the bother. The next processor architecture would mess up you clever clock-count calculations. The effort was almost always better invested in satisfying feature demand as PCs became more capable. Not only does the architectures improve, but so does the cleverness of your compiler (not including your hand-polished asm). If the software people actually knew that die shrinks were a thing of the past, it would make sense to be more aggressive in the choice of algorithms and execution regimes. They might even be well paid to indulge in premature optimizations postponed, since this would become the main avenue to sustaining performance gains.

    There might be more pressure to bet on the right horse, which could thin the herd. Competence gradients tend to have this effect.

    • by Belial6 ( 794905 )
      This is correct. It is why I have always argued that 'Software Bloat' is not a problem. $10,000 spent on optimizing a piece of code is a worse investment than spending $2000 on writing another piece of 'bloated' code that optimizes your business and makes you $10,000s more in profit. All the while having the steady march of hardware development both make all of the code faster, as well as reduce the value of any previous optimizations.

      If and when we hit a wall on hardware speed, then we can spend the
      • by rdnetto ( 955205 )

        There's a difference between premature optimization and software bloat. I can see absolutely no reason one program should take up 2+ orders of magnitude more resources than a competing product with 90% of the features.

  • ...that'll take another few decades to realize. They're really awesome about tooting their own horns. Execution? Not so much.

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