Samsung '3D' Memory Coming, 50% Denser 87
CWmike writes "Samsung on Tuesday announced a new 8GB dual inline memory module (DIMM) that stacks memory chips on top of each other, which increases the density of the memory by 50% compared with conventional DIMM technology. Samsung's new registered or buffered (RDIMM) product is based on its current Green DDR3 DRAM and 40 nanometer (nm)-sized circuitry. The new memory module is aimed at the server and enterprise storage markets. The three-dimensional (3D) chip stacking process is referred to in the memory industry as Through Silicon Via (TSV). Samsung said the TSV process saves up to 40% of the power consumed by a conventional RDIMM. Using the TSV technology will greatly improve chip density in next-generation server systems, Samsung said, making it attractive for high-density, high-performance systems."
Saves up to 40% power savings? (Score:2)
Now 40% power savings on the latest 3D accelerator would be awesome. Probably help with heat issue.
Re:Saves up to 40% power savings? (Score:5, Informative)
Googling a bit, one test showed 2x1 GB of memory consuming up to 7.28 watts.
http://www.tomshardware.com/reviews/hardware-components,1685-13.html
For PC, that's practically nothing. For mobile devices, every watt counts.
Re:Saves up to 40% power savings? (Score:5, Interesting)
Not just mobile. Newer generations of HTPCs, Plug like devices are using 20W. The AppleTV2 has a 6W power supply. Assume they overspec'ed it by 20%, that's 5W at full tilt.
7W is a huge % of those numbers.
Re:Saves up to 40% power savings? (Score:5, Interesting)
Not just mobile. Newer generations of HTPCs, Plug like devices are using 20W.
Yeah, I measured my MythTV frontend at 26W from the wall; so if the 4GB of RAM is taking 14W, that would be more than half the total consumption of the entire system.
Re:Saves up to 40% power savings? (Score:4, Interesting)
Out of curiosity, what hardware are you using? I've just picked up one of the new ASRock Vision 3D HTPC's (great little machine for Myth/XBMC; works OotB with Linux for everything except the IR receiver, although for some reason amazon won't publish my review) that pulls 23W from the wall on a bad day, and idles at about 17W at idle. My old C2D-based mATX box pulled more like 50-60W.
But yeah, I've never been able to quantify those power usages of memory. I think they must take an absolute worst case scenario along the lines of "if every bit was flipped at once" or something like that. DIMMs even run cooler than they used to, making those ubiquitous heatspreaders all the more ephemeral.
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Out of curiosity, what hardware are you using?
Probably a bit late now, but that's a Zotac Ion motherboard in a small ITX case with some 'silent'-ish fans, 4GB of RAM and an X25-V SSD. It doesn't really need 4GB, but since it's running off a cheap SSD I wanted to push all temporary storage into a RAM disk to reduce SSD writes.
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Thought about buying an Ion myself, but I found the atom sucked for most non-video stuff; was crappy with XBMC and youtube bits (running XBMC on top of debian myself).
Also using an SSD, a 30GB OCZ vertex, but from my experience with the Intel drives you can safely use them for temp storage. Also got 4GB in the ASRock (which is essentially just intel and nVidia laptop components in a Mac-mini-esque chassis) and it's laughable how little of it linux + XBMC ever use :)
Surprised the atom eats so "much" power th
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For stationary devices that run on battery anything that peaks over 0.1W is unacceptable. When you are expected to run your stuff for at least 2 years on 3 AAA cells you'd better cut down the average consumption to the uW range.
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Looking up some datasheets on Kingston's "valueram.com", 2x1GB DDR2 DIMMs use about 1.0-1.4W depending on clock speed. That drops to about 0.8-0.9W for DDR3 modules.
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For a server with say, 16x4GB dimms, that can add up real quick. Consider a farm of 40 such machines. Every watt counts.. when dealing in extreme scales (both small and large)
Not to mention, heat generated is just as significant as power drawn.
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How much it is depends on what kind of limits you have. Server power draw can run up against building or power grid limits, at which point every watt counts.
Re:Saves up to 40% power savings? (Score:5, Interesting)
Additionally, an average server has 2x cpus, 8x memory, while having 0x graphics compared to an average desktop. Another problem is that we are running out of tricks for reducing dram power, which means that the portion of dram power may increase steadily in the near future.
Even graphic cards have a sizable, high-bandwidth ram on-board.
Trust me, DRAM power consumption is becoming a serious probpem.
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Re:Saves up to 40% power savings? (Score:4, Funny)
Trust me, DRAM power consumption is becoming a serious probpem.
So is apparently cosmic rays. ;)
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Perhaps more importantly, RAM power is close to constant. If your CPU load is low, you can underclock the CPU and lower the power usage. You can spin down disks when they're not in use. Pretty much any other component of a modern computer can be powered down when not in use, but RAM needs to constantly refresh its contents. This means that it is consuming power at a pretty constant rate. It takes slightly more power to read or write, but not very much.
In theory, an OS could swap things out of most RAM
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What about SRAM (Score:1)
So I'm guessing that much of the DRAM power budget is taken because of the requirement to Refresh. At 1 transistor per cell, DRAM has been 4x less expensive than SRAM, before taking consideration of economies of scale. So where is the SRAM market? Why do we still not see an alternative with better speed, and power, at the cost of price and storage density? Why can't I make that choice? And while we're on the subject of MIA memory technology, where are the FRAM devices? Those would be flash-based SSD killers
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Re:Saves up to 40% power savings? (Score:4, Funny)
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Yes. It really does.
The reason is that to get the signals off the chip you have to amplify them and then take the losses of having to line-charge the bond pads, bond wires, package traces, PCB traces, etc. This charging is simply done due to physical parasitic losses induced by shipping the data off-chip. Keeping it all on-chip avoids this and allows nA-uA currents to be used throughout rather than kicking things up to mA currents and then back down again.
This, combined with jitter limits, is part of the
3D (Score:1)
Great, does the CPU now need 3D glasses too ?
TIME TO BRING BACK CORE !! (Score:4, Funny)
Core memory is static in the true sense of the word. I've got core memory that hasn't changed a bit in 60 years. Punks !! You don't know memory.
Re:TIME TO BRING BACK CORE !! (Score:5, Funny)
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With core memory, a read is destructive, so it's not truly static.
Oh great. Dense memory. (Score:3, Funny)
It'll fit right in with my ex's computer. Stupid P.O.S. Gateway.
*takes a deep breath...* NOW WHEN SHE TYPES IN ALL CAPS and overuses LOL ON FOXNEWS.COM and adds a thousand!!!!!!!!!!!!!!! EXCLAMATION POINTS... her memory can be just as dense as she is.
Re:Oh great. Dense memory. (Score:4, Funny)
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We're happy to hear to the woes of the few among us who have ever had social contact with the opposite sex ;]
It can get much worse... [slashdot.org]
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Snippet from a boot sequence:
CPU: Memory, are you dense?
Mem: Yes, I am.
CPU: Derp
good or bad? Not sure yet (Score:1)
One way to look at this is "oh good, people have been talking about stacked chips for years, and they're finally rolling it out for mass production. Another tool to increase density. Yay!"
The other point of view: "The geometries aren't going to be shrinking much longer, so chip makers are starting to turn to desperate measures to keep Moore's law going. This will work once or twice, but when the shrinks stop, and the chips are already stacked, we're going to run out of roadmap, probably soon".
Not sure wh
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Well, IBM seems to think the next step is liquid coolant. Then you can just keep stacking them higher. Not sure myself. I don't really like the idea of water inside the chips, and there doesn't seem to be a good replacement for freon. (Or maybe there is. What do modern refrigerators work on?)
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tetrafluoroethane. [wikipedia.org] A fluorocarbon.
Similar to what is in compressed air dusters. (usually difluoroethane. [wikipedia.org])
With both compounds boiling at room temperature though, your ram chips will be internally pressurized, which means mechanical stresses during heating and cooling cycles.
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And if we ever DO have a period with no technological progress we have created ourselves a comfortable buffer zone... Software efficiency can be improved grea
Will Apple bite? (Score:2)
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I'd be interested to see if they put it into a new generation of apple Xserve rack-mounted servers.
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You mean... the ones [apple.com] they've already announced will be discontinued?
From Wikipedia: "On November 5, 2010, Apple announced that it would not be developing a future version of Xserve."
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Apple are already using DDR3 ECC (they don't say if it's registered or unregistered but I suspect it's registered) in the mac pro and xserve. It's not like apple had a lot of choice in the matter, memory controllers are now in the CPU so the CPU vendors call the shots as to what will be supported.
Good news for data centers (Score:3)
Anything that reduces the cooling load and the power bill will be welcome.
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I don't know about Rambus inventing it, but I have seen SIMMs with stacked chips before at my part time bench testing job. There was a batch of them in a box of very old RAM I had to evaluate. We didn't have a server on hand old enough to put them in for testing (they were registered units) so they stayed in the junk bin.
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That's exactly it. It's a way to have two layers of silicon stacked and still connected through each other. Because right now all the connections for a memory chip are around the edges and the back, and you can't really double that up with just more wires.
huzzah (Score:2)
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Thing is the memory support on desktop boards is already ahead of what most people need even with todays "bloatware". LGA1156 supports 16GB and desktop LGA1366 suports 24GB yet even among "enthusiast" forums the consensus seems to be that 8GB is plenty.
Great. (Score:5, Insightful)
Yeah, what about using both sides? (Score:4, Interesting)
I've always wondered if there was a reason why manufacturers didn't use both sides of the silicon for lower powered chips, like memory. Seems like a win-win... twice the component count for the same silicon investment. Yeah, handling might be tricky, but not a showstopper.
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They already do, buy a bit more dense memory than you're used to (or can afford) and you'll see it happen.
This I believe is talking about stacking multiple chips on one of the sides, probably in the same packaging as a single chip.
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Not a new technique, either. It's just another stacked die - where you have multiple chips stacked on atop the other. Stacked dies have been commercially available for at least 5 years now (usually they're used in flash chips).
Some form of packing together multiple dies has been around. We've had multi-chip packaging (like the Pentium Pro), package-on-package (where you put two ICs on
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Except for the plummeting yields, which could easily - or even likely - mean *more* wasted silicon.
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They don't use both sides because the back side is where the robot handlers touch the wafer to move it. At several steps in the wafer process it is vacuumed down to chucks to hold the wafer and keep it flat. If you did print on the back the pattern would be damaged by all of the backside handling and ruin the chips back there. There is also the issue of front to back wafer alignment. While I am sure some college kids or some profs will come on and try and quote some things from some text books and sales
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Cube memory? (Score:2)
Will this perhaps give us a chance at having cubical memory stacks to plug into our motherboards like tiny processors? I could really enjoy 2GB RAM in a little 3/8"x3/8"x3/4" stack. Key it right and save costs on PCB. Might be able to be cooled just as easily.
Re:Cube memory? (Score:5, Interesting)
3D geometries have serious issues with line saturation and heat dissipation. This is because of thermal noise, and the increased voltage needed to overcome it. (which in turn, creates more heat.)
We are already at the point where high performance RAM chips need heat spreaders, and that is with 2D chip geometries that can eliminate heat reasonably efficiently.
When you start stacking multiple silicon fab layers together, heat builds up in the layers, requiring more voltage to overcome thermal noise, which produces more heat...... You get the idea.
Without separating the layers with some kind of highly thermally conductive intermediate to pipe the heat out, the insides of the chips become little easy bake ovens, and estimated service life drops radically, as does performance metrics.
I could see them going 2 levels deep in the geometry, with a special package with heat spreaders on both sides (of the package itself that is- not the DIMM) or something crazy like that-- but I really can't see a big "solid 3D block" of silicon getting plugged anywhere. IF such a technology were to come into being, it would need to be made from something that is damned near to being a room temperature superconductor to keep from being unreliable/a fire hazard from thermal noise.
Alternatively, it could be done in a photonic computing approach, using optical transistors and optical interconnects... that would solve the heat problem too, but would make servicing the system substantially more difficult.
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http://www.xbitlabs.com/news/coolers/display/20031008155430.html [xbitlabs.com]
http://www.electronics-cooling.com/2002/11/electroosmotic-microchannel-cooling-system-for-microprocessors/ [electronics-cooling.com]
http://www.frostytech.com/articleview.cfm?articleid=2424 [frostytech.com]
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For heat dissipation, just make the entire outside of the module the heat sink. It's what I do for ultra-power LED diodes, and lemme tell you, those get WAY hotter than any RAM chip could dream of, plus pull more power (some of these diodes are 100w a piece.) Drop a fan on it for when you overclock, just like normal. No big change in anything, really.
Microfluidics got mentioned, but really that's pointless without a huge phase change section, and that addition renders my idea of 3D RAM useless, plus fluid+
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The square cube law is always the elephant in the room when people start talking about 3D circuits. It is certainly a problem, but the field is still open to improvements. For example, the "through silicon via" process presumably means they etch a via entirely through a silicon wafer and plate it with a metal. These could also be used as heatsinking aids and not just ways to transfer signals through vertically stacked chips, and though some surface area is consumed it may be more than made up for by the
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Why is DRAM so large compared to flash memory ?
flash is nice, but incredibly slow, especially in write, compared to dram. We are talking several orders of magnitude here, not just 10% or something. Also if you have 100 meg write rate (wishful thinking) and the drive burns out at 100K rewrites (wishful thinking) and its about 10 gigs, the numbers divide out to the drive will be dead in about 100 days. Different technologies have certain tradeoffs and flash is nice and small and low power and nonvolatile, but it is slower than molasses and short lived.
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Most flash memories use a serial interface providing access to large amounts of memory through a small number of pins. The price is higher latency for memory accesses. DRAM uses a parallel bus to minimize bottlenecks at the cost of needing many more connections to a chip or module. Even RDRAM is parallel to some extent. Furthermore, about half the pins in a modern day memory module are grounds to minimize crosstalk at the high switching speeds. The I/O requirements for high speed memory all conspire to forc
And next... (Score:2)
I find this funny... (Score:2, Interesting)
I have been doing "3d" ram stacking for decades... I did it first in 1983 on a TRS-80 Color computer. I had 2X the max supported ram the machine could handle. I simply used a toggle to switch ram banks, later I added logic to allow the computer to do that for me. Writing programs that consumed most of ram and stored data in the other bank were fun...
What ele is samsung going to discover that hardware hackers have been doing for ever and a day?
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they're talking about stacking the dice, not the devices. You know what dice are? They're the little chips of silicon that are then packaged to make the IC's that you typically see and use. Unless you can precisely align and drill little tiny microscopic holes in the dice and electrically connect the one on top to the one on bottom, then you haven't been doing what they're doing. Not even close.
The closest anyone has ever got to this is stacking small dice on a larger die and wire bonding the pads of one to
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Exactly. The Amiga 1000 I bought in 1988 had a hack like this done by the prior owner (in fact, it's still in my attic). Tripled the motherboards' memory (256 to 768k iirc...), and since the Amiga would detect any memory in the system and just tack it onto the address space, no configuration headaches. Damn, those were the days. :) (FWIW, it had that piggy-back chip hack, the front-loaded mem expansion, I added a 1.5 MB daughterboard that plugged into the CPU socket, and finally added some SIMMS to my X
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Except for the fact that this development is absolutely nothing like what you describe. But hey, who let anything like logic stand in the way of a "I used to do X back in the day" post?
3D memory "new" ? (Score:1)
Radio Shack COCO 1 anyone?
My BF did that to mine for me like back around 1980 or so..
TSV is 29+ years old (Score:1)
Interesting that TSV is found to be useful after all. 29 years ago an AMD employee independently conceived of TSV and AMD refused to talk to the employee about this and other concepts, nearly all of which have subsequently been developed and patented by AMD's competitors.
Stupid glasses (Score:3)
As long as I don't have to wear those stupid glasses, I'm all for this 3D memory.