Catch up on stories from the past week (and beyond) at the Slashdot story archive

 


Forgot your password?
Close
typodupeerror
×
Hardware

Scientific American on 3-D Chips 138

Posted by michael from the tower-of-babel dept.
m5shiv writes: "Scientific American is running a feature on 3-D Memory Chips. These devices look like they will significantly reduce the cost of PDA's and other handheld devices as well as replacing analog film. By stacking devices vertically, density goes up considerably. The company, Matrix Semiconductor, appears to have some very interesting investors such as Kodak, Sony and Microsoft."
This discussion has been archived. No new comments can be posted.

Scientific American on 3-D Chips More

Scientific American on 3-D Chips

Comments Filter:

  • Heat Dissipation (Score:3, Interesting)

    by UVaRob ( 243769 ) on Tuesday December 11, 2001 @08:18AM (#2686484)
    The article talked about how heat dissipation will be impaired by the 3-D structure (obviously, when you increase volume relative to surface area.) Maybe in years to come we'll see some sort of chip/heatsink integration to channel heat directly from the interior of the 3d structure to the outside by the heatsink rather than the normal dissipation through the chip.
    • The article talks about the boundary problems between silicon grains. If you could use those boundaries to install heat sink pipes, you might avoid the transistor failures mentioned as well as overcoming the internal heat dissipation issue.
      • Knowing what we do about the heat sink requirements of chip like the pentium IV, which basically a silicon wafer, I can imagine the heat output of a _cube_ of the same dimensions.

        Fo one thing, if we go to a silicon cube, we will wind up having to heat sink 5 sides, not just the top.

        There will like be a practical limit to cooling which means that we will not achieve a real cube in terms of proportions. For a long while with thinning layers will compensate for the increasing thinckness, so that even with hundreds of layers, it will likely be only as thick as many of the other earlier designs, say the 386 or 486. But the heat density is still going to be amazing.

        The science fiction prediction imagines a story where computations are basically done by a pool of molten metal kept under high pressure to keep everything aligned.

        • they won't really be cubes as you say.

          in memory heat won't be much of an issue as stuff doesn't all switch at once and bits are stored in capacitors anyway (DRAM). but in logic the heat could be bad and all stacked on top if itself. heat pipes or vias JUST for the heat may be necessary.

      • Boundary problems will probably go away (Score:1, Interesting)

        by Anonymous Coward
        There is now research being published which manages to produce grains potentially much greater than transistors at precise locations, although this was being done with excimer lasers for quite some time they are now even managing it with deposited seed chemicals ... so it can be done with just another process step.

        If you are able to form grains larger than the transistor and at precise locations boundaries are not a problem even in thin film deposited silicon. Apart from that for the memory cell's the grain boundaries never were much of a problem anyway, as long as you can keep all the high speed logic at the bottom there isnt any problem anyway.

        I think Matrix is only interesting because they are promising product soon ... personally Id much rather see the thin-film memory from companies like thinfilm.se and Ovonyx commercialized. Memory through the use of anti-fuses in a 3D semiconductor is nice, at least thats what I assume they are doing, but write once memory just doesnt do it for me.
    • You know, heat dissipation of CPUs is something I was just thinking about recently. It seems rather inefficient to try to cool a CPU with a powered cooling device (fan, peltier, etc.) - when all of that waste heat could instead be harnessed and used. I realize it isn't going to provide lots and lots of power, but even if a cooling-cap was built that used heat to power the lights on the front of the case, it'd be a start.

      I guess people figure the initial cost of this type of energy-saving cooler would far outweigh its benefits? Still, it would just be a "gee-whiz" cool thing to have in your new PC - and might become more worthwhile as production increases and economies of scale take effect.
      • Not that I've done a study, but the "wasted" energy of heat may not be wasted. The heat does need to leave the immediate area at a minimum rate.
      • Run distributed.net or something during the winter to keep your bedroom warm :) CPUs dissipate a lot more heat when doing work than otherwise, esp. when the idle loop halts the CPU clock until the next interrupt. (Linux and WinNT do this on x86, and probably on other arches that support it.)
        You couldn't really just power stuff from a thermoelectric generator, because the CPU barely runs above ambient temp while idling. (I've taken the heat sink off my k6-2 350MHz, and it barely gets warm to the touch while idling.) You'd have to let the power come from the power supply then.

        However you went about it, it would not be a good idea to do this anyway. Thermodynamics dictates that the amount of power you can get is proportional to the temp difference between the heat source and its surroundings. You'd have to have a temperature difference across the generator, plus all the temp diff across the stuff that conducts the heat to the generator, and away from it. (With the small temp diff you'd be able to manage, the efficiency would be very low, so most of the heat would come out the other side anyway, and you'd have to get rid of it in the usual way.) You want to keep your CPU as cool as possible, so it doesn't burn out, so putting an extra thermal barrier in the way is not good.

        Basically, you'd gain so little from generating power from waste heat that it would not be worth doing, besides the fact that doing it would have a direct negative effect on the cooling system.

  • The author may be a bit biased... (Score:3, Informative)

    by Phosphor3k ( 542747 ) on Tuesday December 11, 2001 @08:19AM (#2686488)
    If you read the bottom of the article, you notice the author holds 14 patents for this new technology.

  • About the company (Score:2, Informative)

    by Segfault 11 ( 201269 )
    Some of the founders had much to do with the founding of a company named Rambus, Inc. as well. Here's hoping they've learned from the mistakes of their former company.

  • Eggs in many baskets (Score:2, Interesting)

    by laetus ( 45131 )
    Not a flame. Just an observation. Is it me or does it seem like Microsoft has got an "investment finger" in the pies of a huge number of new technologies coming out?Is this a diversification strategy or a way to say, "Hey, we own part of this company and we'd like you to make so changes suitable to our software?".
    Just curious.
    • No its called venture capital. Anytime you are making money, there becomes a need to spend it. This is a good way for big companies to spend all that cash they are generating. It does look good that they are stimulating new startups, however I am quite sure they expect a return on their investment.
    • Remember: Embrace and Extend. Or smother and absorb depending on how they feel.
    • Think about this one for a second. As a software company, Microsoft, along with Red Hat, Mandrake, and every other software company on the planet, depends vitally on the availibility of cheap, high performance hardware in order to run their product. It just so happens that Microsoft happens to have more spare investment capital laying around than most other software companies. This isn't the Evil Empire at work, this is just smart business.
    • But they ARE making changes suitable to their software. With a massive ram upgrade you might even have enough for whatever comes after XP.
  • Did Thomas H. Lee, the author of this article, die in February [mit.edu]?

    • Re:Is Thomas H. Lee Alive? (Score:1, Informative)

      by Anonymous Coward
      It's a different Thomas H. Lee -- take a look at his Stanford faculty page [stanford.edu]. You can tell it's a different guy because the one at MIT died at age 77, and this Tom Lee is in his late thirties.

  • 3D (Score:1, Insightful)

    by Anonymous Coward
    First 3D-Glasses [spacekids.com]
    Next 3D games [3dgamers.com].
    Then Doritos 3D [doritos.com]
    Now 3D-Memory Chips
    What's the next?

  • At last! (Score:4, Funny)

    by Schpoonk ( 243228 ) on Tuesday December 11, 2001 @08:37AM (#2686537) Homepage
    Good job they finally invented these. I kept losing my 1 and 2-dimensional memory chips down the back of the couch.

  • From the title of the /. post... (Score:3, Funny)

    by Xpilot ( 117961 ) on Tuesday December 11, 2001 @08:43AM (#2686553) Homepage
    ...I thought it was some kind of gimmick on SciAm's part that allowed us to read their magazines in 3D if we had a decent 3D card... heh... kinda like their April Fool's articles.

  • It will not replace your flash memory card... (Score:3, Informative)

    by brinkie ( 96643 ) on Tuesday December 11, 2001 @08:45AM (#2686557) Homepage
    From Matrix' website [matrixsemi.com]:
    Matrix 3-D Memory is a field-programmable, archival medium. Cards with 3DM are write-once and the programming can happen all at once or in parts over time. Once on the card, the data is secure for generations and can be read repeatedly.

    So it's merely a writable-CD-on-a-chip. Maybe they will develop a rewritable version someday :-)

    /R

    • Precisely what I noticed. They blow out anti-fuses - make a physical connection - to store the data. Perhaps they can manage to make Flash work on a multi-tiered level...

      This permanent film thing may be the fix for some applications, such as insurance, where you're not allowed to take digital photographs for fear of altering the picture after the fact.

      This might help people make the jump to digital imaging, too, if they have an analogue to film negatives (deletable, non-permanent files only on their PC may put some people off from the idea.)

      But I won't use it in my digital camera, though, because of its recurring cost; my Microdrive is reusable, and I archive onto my PC (CD-R, as soon as I buy one, and CD-R media is much less expensive than this purports to be).
    • Maybe if you had read the article, you would know that they wish to first mass produce the technology on simple write once memory, before moving onto more complex designs.

      You would also know that they claim to have produced the more complex DRAMs and EEPROMs in the labs successfully.
      • I wasn't referring to the article (which I have read before posting, thank you very much), I referred to the company who is developing and marketing this technology. Their sole product to be launched somewhere in early 2002 is a write-once memory. Successful research may have been done to RAM and EEPROMs, however, they have not yet announced such products.

        A very informative article can be found here [matrixsemi.com]. I will quote a piece of that article:
        Although the first product is a write-once variant of traditional reprogrammable Flash memory, it is reasonable to assume a fully reprogrammable part is a potential follow on product. The introduction date for this follow on is indeterminate at this time. Matrix has chosen to stay focused on putting the write-once product on designer's roadmaps instead of spreading their efforts into other areas where they could lose focus.

        /Robert

    • For more information about Matrix Semiconductor's plans about the future, please read this article [matrixsemi.com] (http://www.matrixsemi.com/files/10076683300.pdf)

      Although successful research has been done to rewritable technologies, they will focus on write-once memories for the time being:
      The Matrix model brings a very low cost point into the picture but with a write-once approach. Instead of buying one or two reprogrammable cards for semi-permanent storage, consumers would use many of the write once cards for permanent storage and add cards as needed. The advantage is always having a permanent copy of the file that cannot be erased and is accessible on demand.

      /R

  • So? (Score:2, Interesting)

    by erc ( 38443 )
    And why is this so revolutionary? I came up with silicon stacking at Sperry-Univac in early 1980, complete with heat pipes to channel away excess heat. I offered it to Sperry, but they weren't interested. Too bad - my design was for CPU as well as memory chips.

  • Moore's Hunch (Score:3, Funny)

    by imrdkl ( 302224 ) on Tuesday December 11, 2001 @08:51AM (#2686575) Homepage Journal
    Having been postponed or negated several times now, should we call Moore's law a postulation at best?
    • Moores "Law" (roughly): Silicon chip bang for the back doubles in a fixed time, estimated at 1 year to a year and a half.

      Having been postponed or negated several times now

      Nope, it hasn't. Fears of it running out of steam have however been postponed or negated several times now. However it must run out sometime. The physical universe has limits.

      Interesting note is that that Ray Kurzweil has tracked this trend back to 1890s through several generations of technologies, and it holds all the way. Therefor there is no particular reason to believe that it will end when we move from silicon to something else. However, as I said, the physical universe does have lmits. It will end, likely sometime in the 20xx years, since it is doubling.

      should we call Moore's law a postulation at best?

      Moore's observation is probably the best term, since that's what it is: an empirical observation of what is happening, and was never intended to be taken as a law of nature, which it certainly isn't.

  • The author states that the first generation of their chip will be a 512 million bit device. i.e. 64Mb. That doesn't seem like a lot to me...
  • ...so that they'll actually still be useful eighteen months after I buy them.

  • Ending up down the wrong path (Score:3, Interesting)

    by snatchitup ( 466222 ) on Tuesday December 11, 2001 @08:59AM (#2686593) Homepage Journal
    At first reading this technology seems like it has a future, in that, sure it's early in its infancy, but somebody will come along and make it work.

    But what we're really talking about is not 3-D, it's just stacked 2-D. In fact technically, all computer chips are 1-D.

    Because of the limitation of the fact that the Silicon crystal needs to be monolithic, that is, a lattice of atoms completely ordered throughout the chip we've got to think outside the box, this guy's inside the box, but realistically, this is to save money, and he wants to see something before his great grand kids are born.
    The heart of the problem is the crystal flat surface. What we need is a crystal that grows out and up in such as manner as to be a monolithic latice but also compartmentalized. A cube, with little windows and rooms and holes so that the dope can get in.

    Completely revolutionized fabrication thinking. We'll see it in less than 50 years.
    • Nope. Computer chips are most definetly not 1-D. Even 2-D is kind of stretching the truth but can be accepted as conceptually it is the best way of describing the architecture.

      Strictly from a physical standpoint they are 3-D and this is best proven by the lack of widespread infinite memory capacity as between any two points there is an infinite number of 2-D planes and this can be proven mathematically.

      1-D is just pure silly because even doing a flat representation of a modern chip requires a 2-D plane, and a rather filled up one it is for even a simple memory chip.. There is no way one could trace anything more complicated than series of capacitors, resistors or semiconductor junctions on a single line and even then it would physically 1-d only from the standpoint of path of electricity.
      • and even then it would physically 1-d only from the standpoint of path of electricity.

        That's what I was talking about of course....

        Anything tangible in this world is 3-D. But functionally, it may be 1,2,3, or n D.

        Even my idea of a cubic wafer is still functionally 1-D. Anything discrete is 1-D.
        • That can't be right, can it? Consider:

          (1) If the electron always travels the same path, than the output is always the same--not anybody's definition of a "computer"!

          (2) Therefore, from (1), there must be more than one possible path for the electron to take.

          (3) Any time the path branches, I'd imagine you've moved from the 1-dimensional world to the 2-dimensional world.

          (4) Thus, from (2) and (3), logic arrays are conceptually 2-dimensional.

          Or am I missing something?
    • agreed, it's mostly 1-D.
      the channels are so thin, and short that basically the electrons/holes just shoot across (short channel effects aside). the width is primarily used by logic designers to account for loading (like multiple lanes on the highway).
      now, device people have to take all 3D into account, but they basically end up back in a 1D approximation that works.

      As far as the process guy people are concerned it's all in 3D and your cube with little windows is how doping works now. One doesn't need little windows, the dopants are injected or diffused into it. The "windows" are then closed by reducing the temperature, or "activated" by annealing.

      in this case it is just stacked 2D, there is lots of research in the area of stacked 2D, both for real-estate (some phones have stacked processor/mem chips in them now. they are just connected with traditional wafer bonds)
      and some for performance (like Matrix Semi.)

      "lattice of atoms completely ordered throughout the chip we've got to think outside the box, this guy's inside the box, "

      : actually he IS outside the box he's trying to use little bits of single crystal Si and fit his devices inside each little piece. that is VERY difficult and requires insane processing technology and alignment. OR in his case, reduntant ckts and error checking.

      crystals are grown in 3d. they jsut can't be grown ontop of other stuff, or even on itself very easily without getting massive dislocations, etc.

      i hope this made sense. :-)
      -eric
    • Chips are 1D? I don't think so -- how do you make a physical loop in 1D?

      If all that was in the chip was one long line of parts, then yeah that would make sense. It's not tho, the circuit is closer to a grid than a line. My vote's on 2D.

      And whether it's produced by layering of 2D sections, or by some funky 3D fabrication process, I would say as the number of connections between layers approaches the number of connections on a layer (in one direction), it's closer to real 3D circuitry.
      • If all that was in the chip was one long line of parts, then yeah that would make sense. It's not tho, the circuit is closer to a grid than a line. My vote's on 2D.

        A grid is like an array, but still it's one dimensional. Look at computer language, arrays are always 1-D after compiled. If x is a 5x6 array, then x[3,2] really becomes x[3*6 + 2] = x[20]...

        Circuits for chips are non-linear though, right?
  • I *knew* there was a problem with my Abit mainboard...

    "The second advance was a way to flatten each coat of new material so that the chips don't rise unevenly like towers built by drunken bricklayers."

  • building 3D chips one layer at a time (Score:3, Offtopic)

    by mblase ( 200735 ) on Tuesday December 11, 2001 @09:03AM (#2686606)
    It doesn't seem to be discussed in this article, but there is much progress being made on "3D copiers," computerized machines that will build complicated 3-dimensional objects one layer at a time out of ice or plastics. Because of how these objects are constructed, shapes that would be impossible to carve from a solid mass can be "molded" from the bottom up or from the inside-out.

    If 3D chip design proliferates, I predict that these two technologies will eventually merge. Sophisticated chips will be assembled one layer at a time, perhaps one layer of atoms at a time, with electronic pathways twisting and turning through a three-dimensional block of material designed to ferry heat away from the core of the device. The main advantage, of course, would be enabling shorter pathways from one part of the chip to another, improving further as design improves. Perhaps in time motherboards would be replaced by "motherblocks" and the entire computer will become far more portable.
    • they are sort of the same thing. you are talking about what is used all the time for rapid prototyping. SLA or stereo lithography. notice the word "lithography". :-)

      in their form of 3D chips (lots of other ways to do this), they lay down layers of poly, then laser anneal to get bigger single crystal grains, then mask and etch just like conventional silicon. So it is sort of the same. ..In that a laser is used to form the poly, and in your example a laser is used to 'crystalize" the shape. In their chips ultra-violet lasers and photoresist, then etch, is used to make the shapes.

      I think it is somewhat futile to try to combine them when they are already so similar and the outcome is already determined, and existing technologies exist. but it is an interesting parallel.
    • Whilst i'm no guru on chip fab, this seems to be pretty close tot he way i understand how it works today.

      You start with a silicon wafer, and then variously apply masks, metal layers and doping the silicon underneath.

      You'll end up with a wafer that has a thin layer of SiO2 but with windows cut in it. Copper or Alu interconnects are applied onto that.

      Of course we are only talking about a few layers here, not very 3d when you consider the area of the die versus the thickness of the active circuitry.

  • The most interesting thing... (Score:3, Insightful)

    by Evil Oli ( 516455 ) on Tuesday December 11, 2001 @09:05AM (#2686611)
    about the article in my opinion was the part saying that we are nearing the limit of miniaturisation of electronic components.

    I mean, think about it.

    If we're going to reach the limit of how small we can make these transistors by say 2020 (by which time we'll most likely be up to around 30Ghz processors), that's a major limitation in this industry.

    The way I see it, it could go one of two ways:
    1. We reach an inescapable limit of electronics, and the entire computer semiconductor industry implodes because it can't keep up with it's own reputation for performance increases.

    2. Before that deadline occurs, some new fantastic and mindblowing technology is created. By this I don't mean some 'chip-stacking-bastardisation' of electronics but some true breakthrough.

    Whichever way it goes, it's going to be very exciting, and I'm glad I'll be around to see it. Considering how much our lives are impacted by electronics these days, it could be the modern-day equivalent of the industrial revolution.
    • Either that, or the industry will (gasp!) be forced to re-connect with reality and find something else than continuous exponential growth (which is simply impossible in the long run) to support it.
    • I hope that by 2020 we aren't using clocked processors anymore. The clocking of the processor uses a tremendous amount of energy and is one of the major hurdles in the reduction of power consumption. What I would like to se by 2020 is something in an asynchronous processor like mentioned here [man.ac.uk].

      These could be a far more feasible revolution in processing than 30GHz processors. Not to mention that I'd hope we see processors at least equivalent to 30GHz in less than 18 years. Assuming that it took ~7 years to go from 133MHz to 2GHz it seems feasible according to Moore's law that it should be less than a decade to get to 30GHz.

  • Later this year... (Score:3, Funny)

    by elgen ( 22169 ) on Tuesday December 11, 2001 @09:12AM (#2686636)
    The first products incorporating such 3-D microchips--memory cards cheap enough to use as digital film and audio-recording media--are scheduled to appear later this year.

    ... They've got to hurry. There's only 20 days left...

  • A few notes (Score:2, Interesting)

    by hovik ( 257174 )
    1. Designing 3d chips must be hell. No wonder they stick to memorychips where you mostly just have to copy/paste chip structure.
    Seeing xxx layered cpu's seems unlikly untill designtools can handle 3d strucures efficiently. This will certainly take a long time.

    2. Moores law is dependet on shrinking the transistors so more can be fittet on the same amount of space, 2d -> n^2
    If the transitors are shrinked in height as well, the possible amount of transitors in a cube would be increased by n^3.
    (This won't work in practise yet, they've got it working with 12 layers, but would be cool)
    • you make a good argument about design tools. but this is just 2D stacks with big vias, i thinkt he vias are actually off to the side in their existing technology.

      anyway, cadence and others can do stuff in 3D. you just make another layer that will be used as an interlayer via and line them up so they don't hit stuff just like in the classical method. you can even stick in your own design rules so that they aren't too close, etc. just make one design for one layer, another for the other layer, superimpose, align, via, connect, and BAM! yer done.
      (yes i've done this before) :-)
    • oh, and most of the vertical space is taken up by the substrate not by the devices. so they are technically shrinking because the upper layers in 3D won't have as much substrate.

      and another thing, they DO strink vertically, as the gate oxide is thinned the electric field grows, thus sucking the channel in tighter to the top. so we don't need as much S/D capacitance, etc. Look at SOI for technology which harnesses this.
  • One of the largest issues with combating Moore's law currently is heat dissipation. They mention that it will be a problem, but it may be more difficult than is feasible to fix. Admittedly liquid nitrogen cooling can fix lots of heat dissipation problems, but not many people will be savvy enough to use it.

    This is an interesting idea, and I think that it will probably have applications in packages where not processing power but sizes are the issues. Perhaps in several years we will have cell phones with 3D chips in them, but I don't think that it will have a large impact on CPU markets until the heat issues are resolved.

  • Interesting morning read... (Score:3, Insightful)

    by omega9 ( 138280 ) on Tuesday December 11, 2001 @09:28AM (#2686695)
    For sure, this was a relaxing read while sitting at my desk this morning. But as it went on, it became more disappointing. The idea of doing things in 3D has been bounced here and there for a while in different forms but they didn't seam as limiting (and also not as cheap) as this.
    • 512 million bits=64MB. Not miniscule, but not huge.
    • WORM (write once read many). Yeah, you can use it for digital photography, but you can only use it once.
    • It seemed like he was skirting the heat issue, only mentioning it briefly at the end.


    This initial size doesn't bother me. As it's perfected and costs go down that would grow fast enough. Being WORM media is another issue though. I understand that this is a stepping stone to dynamic media, but at the moment I can get CD-Rs for around $.50/unit that are a proven media, hold much more data, and are already widely supported. And guess what: there are CD-RW already too (he can't do that yet). The heat thing could also be/not be an issue. Perhaps since it's stacked vert it will cool better. It's certainly harder to cover all surfaces in 3D. I have this vision of a cube with a heatsink on it's five exposed sides, only to have a core meltdown.

  • Memory != Film (Score:3, Informative)

    by n8willis ( 54297 ) on Tuesday December 11, 2001 @09:32AM (#2686713) Homepage Journal
    Just for the non-article-reading record, the application towards "digital film" is only that they expect to make really really dense memory devices, so what this technology may replace is CF, not chemical/"analog" film, or even its digital equivalent, like CCD's.
    • so what this technology may replace is CF, not chemical/"analog" film

      The similarity with chemical film is, that the 3D-Memory device can be used once, until it's full. It's a write-once-read-many (WORM) device, unlike the CF, SmartMedia and Memory Stick devices, which are non-volatile RAM devices and can be re-used (Flash memory technology). Maybe a future development of the 3D-Memory technology will incorporate re-writable memory devices. So far, they are not even on the market.

      Also, I'm not impressed by the memory sizes they are offering. The article says 64MB, which is readily available nowadays. Perhaps the price will make the difference. It must be cheap, no-one is going to buy a one-time-use device unless it's -say- 10 times cheaper than a comparable re-useable device.

      /Robert

    • I think part of the argument here is the one major shortfall in digital cameras today: resolution. Everyone knows film has far greater resolution, and that's why (for the moment) digital cameras aren't the norm.

      Now, we obviously need to improve the CCD until we can squeeze billions and trillions of pixels first, but the limiting factor beyond that is gonna be storage space. A little 16MB cf card doesn't exactly cut it when you're talking 8,000x8,000 images. 3-D memory will (in theory) allow such great density that a camera could contain gigabytes or more of memory. Assuming the rest of the hardware advances continue, THIS is the only way we'll ever replace film fully.

      • I'm sorry, but this is a total non-issue. My digital camera (a low-end HP) already has 1GB of memory in it, courtesy of an IBM microdrive. This is, even at "high" resolution, effectively infinite. Give me 10k x 10k resolution, with only 2x compression, and I still have basically as many pictures as a standard roll of film - at, I suspect, much higher quality, especially when compared to that 25mm rubbish they call 'advanced.'

        Moreover, if a breakthrough in CCD's was going to be made, it would occur first in the professional market, of course. In this market, carrying around a 2.5" 20GB hard drive is not a big deal; it's smaller than many of your lenses! I really don't see that storage space is, in any way, a limitting factor in todays digital photography.
      • I think you're not quite correct about this. The current top of the line CCD film scanners (4000dpi), quite closely approach the theoretical limit for chemical film at 35mm. A 4000dpi scanner gives an output of about 20 megapixels. The moment digital camera's have this resolution they are equal to film. This is only theoretically. In practice it will happen much sooner because the pixels a digital camera produces are generally much 'cleaner' than the filmgrain/scanner combo.

        In my opinion digital camera's already surpassed analog camera's with 35mm film. See for example the new Canon 1D [imaging-resource.com] camera. It will take a little longer for medium-format film camera's to be replaced but I think this will be a matter of 2-3 years.
  • Isn't Doug Lenat's Eurisko program the one who figured out the 3d lithography process many, many years ago? I guess he didn't license out the patent very nicely, because we're only NOW hearing about high-density three dimensional RAM chips.

    Oh well, a number of science fictiony people have been talking about this technology for quite some time, and dreaming up amusing applications for it in fields like processing, mass storage, I/O, etc. The idea of a cherry-sized chip with the computing capacity of a human brain is pretty common in those old books.

    Of course, three or four layers of memory is a big step from thirty or forty thousand layers of processor.
  • "One important factor has remained roughly constant: the cost of semiconductor real estate, at about $1 billion per acre of processed silicon."

    That's the first time I've seen real estate more expensive than in Japan.
    • Sadly enough at the height of the Asian boom in 92' this would not have been true. Land was valued upwards of $28 thousand per square foot in the Ginza district in Tokyo giving a final value for an acre of over 1.1 billion! Of course you couldn't have actually put together a full acre but that's besides the point.

      Needless to say they've fallen a bit since then, to around $9000/sq ft. A steal at 400 million an acre!

  • The guy does not understand Moore's law.

    Moore's law is shaped by economic forces. Silicon chips don't "wear out" like metals and plastics. If the industry fails to obsolete the previous generation, what do they have to sell?

    At any stage along the way, there are dozens of potential avenues for reaching the next cost/performance milestone. They simply "do what it takes" to get there.

    3D could have been pursued long ago, but there was no real need. The advantage of making transistors smaller is that the speed increases while the voltage and heat decreases. If you can make a transistor smaller, you aren't going to pursue any other course.

    Moore's law has not "drooped". There has always been something right around the corner to rescue Moore's law, and this article just adds to the evidence that nothing much has changed.

    The significant event at the present time is that leakage current has become sizeable relative to peak operating current. Shrinking transistors is no longer a free lunch.

    I think 3D will succeed in applications where wire latency is a bigger problem than heat dissipation. The biggest advantage of 3D is that it lets you cram more stuff closer together.
    • Silicon chips don't "wear out" like metals and plastics.

      Eventually, ambient radiation deposits fixed charges in gate oxide that damages CMOS circuitry. But the process takes a while, unless you are in space and get hit by a Solar Flare.
  • for my Timex Sinclair ZX80. I had a tower of ram stacked 8 high, all soldered together except for one pin which stuck out with a wire running off it to the data bus.

  • These devices look like they will significantly reduce the cost of PDA's and other handheld devices as well as replacing analog film

    According to the article the plan on making storage that can hold 300 or so 1Mpixel digital images. I have a ComapctFlash card that holds about 200 3Mpixel images, it cost me $110 (on sale ). I figure they hold about the same amount of data as the 3D chips are intended to. So this new technology can make a $110 CF card even cheaper, but not by more then $110. Realistically, probably not more then $100 or $80 cheaper...

    And it won't make cameras cheaper at all since camera makers seldom include CF cards of a useful size at all (my latest camera came with a 8M card, enough to hold fewer then 8 normal pictures, maybe 3 raw format ones -- less then a second of shooting at full speed!).

    It might even make the cameras slightly more costly as venders finally decide to ship "useful" sized CF cards (which is not as good as one may think -- would you want to pay $30 extra to get a 340M CF card when your real plan is to pay $60 for a 1G CF card?)

  • Cost savings not so simple (Score:3, Informative)

    by KarmaBlackballed ( 222917 ) on Tuesday December 11, 2001 @09:54AM (#2686857) Homepage Journal
    This technology looks interesting but there is definitely a good share of hype in both the SciAm article and the company's web site.

    In particular, there is a suggestion that there are cost savings in part because the surface area of a "3d chip" is less than "1d chips" since 1d chips have more surface area there is a greater chance a defect will happen within that area. (Thus "small yield.") This is a spurious suggestion for the following reasons:

    1. Each layer of the "3d" chip is subject to abnormality risk. (Thus real risk is LAYERS x AREA x RISK. For 1d chip AREA is bigger, but LAYERS = 1.)

    2. The chip is mechanically "ground flat" after each layer to prepare for the next. I'm sure this works and I am also sure there a failure rate greater than zero for this operation.

    3. Perfect alignment of the layers is required otherwise one of more parts of the "cube" will fail. They are working on fault tollerance issues right now, and they should.

    Bottom line is that every bad chip drives up the final production cost. This is true for 1d and 3d. Seems like all the risks of 1d apply to 3d and now there are a few more. How will this be cheaper in the short run?

    Let's not get into the heat issue that has not been resolved.

    I hope they succeed, but the oversimplifications made trying to sell this thing bug me.
    • I think a big win is the depth-of-field issue. It is difficult to maintain focus of a projected circuit image at both the center and edge of the chip at the same time for photolithography.

      By having a physically "thinner" chip with the same transistor count, the quality of the optics required is reduced, and at UV wavelengths that is serious money saved.
  • I wonder if there is much research into multi-layer *superconducting* materials. Such an approach would seem to mitigate any problems with outrageous heat dissipation, as well as provide for more electron mobility (i.e., as a direct result of negligible resistance). Thin-film superconductors have been de rigeur for 15 years, so it probably wouldn't be that much of a conceptual leap, but merely an extrapolation of current lines of research.

  • But is it a win? (Score:3, Insightful)

    by Animats ( 122034 ) on Tuesday December 11, 2001 @12:43PM (#2687858) Homepage
    The author writes: Fortunately, I and other engineers have recently found a way to skirt some of those obstacles, to give Moore's Law a new breath of life ... Such "three-dimensional" chips are now being commercialized by Matrix Semiconductor, a company I co-founded ... even for microprocessors, the sky is the limit.

    Modest, he's not.

    The problem, as someone else pointed out, is yield. This involves running the chip through all the steps of lithography, deposition, and etching many times, usually losing a few devices to process flaws on each pass.

    That's why this guy talks about needing redundancy and error recovery. That's nothing new; as far back as the 1970s, chips have been designed with redundant parts that were bypassed during tests, like bad spots on disk. This works well for memory, badly for more complex logic. Historically, the semiconductor industry has considered redundancy, but the wafer fab people always got the yields up to where it wasn't necessary.

    It's clear that this will make memories smaller, but not necessarily cheaper. The number of fab steps per bit fabricated is equal or higher, not lower. Yes, there's a savings on the raw silicon, but that's not a big fraction of chip cost.

    There's also the fact that RAM doesn't take up a significant volume in most current products. Maybe 1% of a PC's case volume is RAM chips. This guy is thinking not of PCs, but portable applications, which is probably right. There's also more price headroom on things like "memory sticks" and "flash cards" than on commodity RAM for computers.

    Notice that he's also thinking of slow, low-duty-cycle applications, like storing music and video. That cuts the heat dissipation. Cooling the gates in the middle layers will be tough.

  • Stacked memory devices? You mean like the ones Irvine Sensors [irvine-sensors.com] have been making for 20 years?

    To their credit, Matrix Semiconductors acknowledges that they weren't the first ones to do this; but rather that they (supposedly) are the first to have mass production capabilities.

    • Re:Irvine Sensors (Score:3, Informative)

      by markmoss ( 301064 )
      That's what I first thought, until I read further into the article. This is NOT a stack of IC's. It's a process for growing more layers of transistors on the surface of one IC. Theoretically, it should cost less than stacked IC's, and may eventually cost less than a set of "2D" (that is, single transistor layer) chips to be soldered onto a board side by side. (A significant part of the cost of a typical memory IC is in attaching the leads for the outside world, covering it in epoxy, and placing it on a board.) However, the cost savings depend on the percentage of finished chips that pass test; if you've cut the raw cost by 50% but cut the yield by 75%, then the cost per working chip is higher. The article doesn't say anything about yields, but if they are actually shipping production quantities for digital cameras, they probably doing fairly well at solving the yield issues, and will do better soon...

      A digital camera is one application where density may count more than price, and I don't see how the Matrix chips can be beat for density. In conventional IC's, most of the silicon is below the active areas and only provides mechanical support. Stack those IC's, and you have many layers of non-functional silicon. The Matrix chip has just one.

      Stacked chips have limited vertical interconnects -- either you connect them only at the edges, or you drill holes through the chips (much bigger than other IC fixtures) and metal-plate those as vertical wires. The Matrix chips can have true 3D interconnects, at the size of other IC features. This may not mean much to a plain memory chip, but it could be very important to other applications...

    • Re:Irvine Sensors (Score:2, Informative)

      by Max Entropy ( 239730 )
      Irvine Sensors puts multiple pieces of silicon in the same package. Matrix is talking about putting multiple layers of devices on the same piece of silicon. Big difference.

  • Not that new (Score:2, Informative)

    by Epi-man ( 59145 )
    This has been discussed for years, but not using poly, using selective epitaxial overgrowth and polish back to make SOI islands. It has been demostrated at the university level while I was still there. Groups had begun to investigate the advantages of having the third dimension available for circuits. I believe they quickly realized that the complexity was overwhelming with no CAD tools available to handle the concept.
  • There is a Swedish company (subsidiary of the Norwegian company Opticom [opticom.no] and Intel) developing stackable "3D" memory based on polymer films: http://www.thinfilm.se [thinfilm.se].
  • To the best of my knowledge, film is CHEMICAL not ANALOG!

Slashdot Top Deals

"The medium is the message." -- Marshall McLuhan

Close