Intel To Buy Altera For $16.7 Billion 63
An anonymous reader writes: Today Intel purchased chipmaker Altera for $16.7 billion. This follows another huge purchase in the semiconductor industry last week, when Avago snapped up Broadcom for $37 billion. This has been a record year for consolidation within the industry, as companies struggle to deal with slowing growth and stagnating stock prices. Altera had already rejected an offer from Intel, but shareholders pressured them to reconsider. "Acquiring Altera may help Intel defend and extend its most profitable business: supplying server chips used in data centers. While sales of semiconductors for PCs are declining as more consumers rely on tablets and smartphones to get online, the data centers needed to churn out information and services for those mobile devices are driving orders for higher-end Intel processors and shoring up profitability."
So, what's the plan? (Score:3)
Any bets on what other purposes they have in mind? FPGAs with one or more QPI links built in, for fast interconnect with Xeons? Xeons with FPGAs on die? Intel NICs with substantially greater packet-mangling capabilities, at full wire speed, thanks to reconfigurable logic?
Merely producing FPGAs on a nice process is logical; but could also be done just by selling them fab services. They presumably have a plan that goes beyond that.
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Re:So, what's the plan? (Score:4, Interesting)
FPGA's can out perform Pentium i7s in certain scenarios. Here is a video showing how a 200 MHz FPGA can perform a discrete wavelet twice as fast as an 2.6 GHz i7.
https://www.youtube.com/watch?v=Er9luiBa32k
The future will be offloading certain tasks to the FPGA, as well as providing downloadable modules that will allow any PC to take on a wide range of roles. One application could be an SDR without any additional hardware, or a data acquisition unit. So, this is all about flexible I/O and optimised processing.
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Probably at the next process shrink, once tomorrow's Pentium is as fast as today's Core i7.
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Memory processes in FPGAs aren't very good. You'd have to really be desperate for a few hundred megabytes of extra memory.
Use FPGA to compress a swap file (Score:2)
Would an FPGA be viable as a lossless data compression coprocessor? That way, the computer could swap to a RAM disk and save space on whatever's currently paged out. It'd be like a hardware-accelerated version of zram (or Connectix RAM Doubler before that).
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The point of zram is to take the memory latency hit while continuing to run at far better than HDD speed. I was guessing that an FPGA would reduce the memory latency hit compared to gzipping each swapped-out page in software.
Re:So, what's the plan? (Score:5, Interesting)
Intel announced Xeons with FPGAs last year.
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IIRC, wasn't that in partnership with Altera?
Intel and Altera have been partnering on things for quite a while, including Altera being one of the first companies to be allowed access to spare Intel fab production capacity.
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I don't think anyone said specifically but that's what everyone assumed.
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Given that FPGAs are big, slow, and hot compared to equivalent logic built as a fixed function chip(but with the obvious benefit of not being fixed function), Altera FPGAs manufactured on the fanciest processes available seem like a fairly obvious product of the acquisition..
That was going to happen anyway. Atlera announced [altera.com] that they were going to manufacture on Intel's newest process back in 2013.
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>Xeons with FPGAs on die?
Intel already did it and the speculation was that it was with Altera.
http://www.extremetech.com/extreme/184828-intel-unveils-new-xeon-chip-with-integrated-fpga-touts-20x-performance-boost
Moore's law is basically running out of steam in a variety of ways so everybody is looking for architectural changes that will allow a way to squeeze more performance out of the same number of transistors. There's been a lot of work in working out how to use field programmable logic to accelerat
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Sure, all you need is another $3,000 software package (and
another $2,495 per year to keep it up to date) to let you do
anything with the FPGA... no problem, right?
Everyone has that kind of cash laying around for every box
they own!
Oh, you forgot $10k in annual support cost.
That's absolutely not a problem when you are running computational workloads for your business that has millions riding on it. Doesn't even have to be mission critical stuff. Even for regular analytics (never mind the "big-data" buzzword). $6k for a significant performance boost (even for specific workloads) and reconfigurability is a piddly amount.
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Sure, all you need is another $3,000 software package (and
another $2,495 per year to keep it up to date) to let you do
anything with the FPGA... no problem, right?
Everyone has that kind of cash laying around for every box
they own!
A fixed $3,000 that's depreciable and a fixed cost of $2,495 annual support? Relative to the $150,000+ annual cost for an engineer who knows how to use it, that's basically nothing.
L2Business, kid.
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Strange then that the FPGA market is growing and the number of ASIC design starts are shrinking per year. It is almost like FPGAs are increasingly being used as ASIC replacements in both the high end (backbone routers, RADAR equipment, ASIC simulation) and the low end (replacing misc logic and often a microcontroller). Maybe because they are.
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Strange then that the FPGA market is growing and the number of ASIC design starts are shrinking per year. It is almost like FPGAs are increasingly being used as ASIC replacements in both the high end (backbone routers, RADAR equipment, ASIC simulation) and the low end (replacing misc logic and often a microcontroller). Maybe because they are.
The GP provided the answer - markets where it's not cost effective to build an ASIC to solve a problem (not high volume enough). There are plenty of those markets, and unless those products ramp up to justfiy an ASIC tape-out, they'd remain in FPGAs. Far more cost-effective. Also, FPGAs allow one to iron out any bugs that may be discovered over time in production.
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My guess would be coarse-grained reconfigurable architectures. Altera FPGAs aren't just FPGAs, they also have a load of fixed-function blocks. The kinds of signal processing that the other poster talks about work because there are various floating point blocks on the FPGA and so you're using the programmable part to connect a sequence of these operations together without any instruction fetch/decode or register renaming overhead (you'd be surprised how much of the die area of a modern CPU is register rena
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What do they have in mind? They can finally realize technology from 15 years ago! See: http://www.jhauser.us/publications/2000_Callahan_GarpArchAndCompiler.pdf
In all seriousness, yes, we will see CPUs + FPGAs in the same package and eventually on the same die. Altera's next FPGA is slated to work at 700MHz--1GHz with an extreme amount of off chip IO and memory bandwidth, so it should be suitable for doing high speed packet processing + computation. This is what Tabula was supposed to do, and, surprise s
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I guess that by including a FPGA in their chips, they could completely get rid of the southbridge/PCH and connect all I/Os directly to the chip. As a result, motherboards will only need to take care about the electrical and physical connections and provide a program to the FPGA for the logic.
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Tricked (Score:3, Funny)
Altera said "pay us $1000 this month, $2000 next month, and so on for 2 years, doubling each month." Intel thought it was a good deal and accepted before doing the math.
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Oh they did the math.... on a Pentium 60.
Takeover Takis (Score:1)
So another computer guy is getting fat on chips?
Layoffs (Score:1)
Expect layoffs after the merger. Cost cutting is almost always done after mergers. What kills me is that many of those engineers that will get canned will be considered damaged goods in today's job market: unemployed == doesn't have the skilz.
So, if you are at Altera, start looking for another job ASAP before the mass layoffs happen. It happened to me and when all of us from the layoff hit the job market at once, it became very very difficult. And it was an interesting coincidence that most of us were s
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http://investors.avagotech.com... [avagotech.com]
In my experience, higher-ups for mergers like this aren't afraid to cut until it hurts, then hire back later (if absolutely necessary).
Avago's past practices (Score:1)
Disclaimer: I'm one of the early investors of Avago
As far as I know Avago does not carry out the "cut until it hurts" routine
I know the style of Hock Tan, the CEO of Avago --- and from past experiences (from the merger with LSI, et al) the 'cut' were mainly of low level, ie, disposable personels, while key people - those who have been identified to have contributed in key technologies - were often offered plumb hike in salary / stock option to get them to continue to perform
In other words, what Hock Tan l
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There's some overlap. Altera FPGAs have lots of fixed-function blocks on them, ranging from simple block RAMs to fast floating point units. There's a good chance that Intel could reuse some of their existing designs (which, after all, are already optimised for their manufacturing process) from things like AVX units and caches on x86 chips. A lot of the FPGAs also include things like PCIe, USB, Ethernet and so on controllers. Again, Intel makes these in their chipset division and, again, they're optimise
Conflict of interest (Score:2)
Altera has many customers who compete with Intel. They are not going to want to deal with Altera anymore. Instead of having Altera as a strong #2, Xilinx is going to own the FPGA business. Good for Xilinx, bad for everyone else.
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So 2^24 dollars? (Score:1)
What was the exact amount?
Intel, Altera, Xilinx and Free Software? (Score:2)