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Intel Supercomputing Hardware

Intel Announces New Enterprise Xeons, More Powerful Xeon Phi Cards 57

Posted by Unknown Lamer
from the send-me-ten dept.
MojoKid writes "Intel announced a set of new enterprise products today aimed at furthering its strengths in the TOP500 supercomputing market. As of today, the Chinese Tiahne-2 supercomputer (aka Milky Way 2) is now the fastest supercomputer on the planet at roughly ~54PFLOPs. Intel is putting its own major push behind heterogeneous computing with the Tianhe-2. Each node contains two Ivy Bridge sockets and three Xeon Phi cards. Each node, therefore, contains 422.4GFLOP/s in Ivy Bridge performance — but 3.43TFLOPs/s worth of Xeon Phi. In addition, we'll see new Xeons based on this technology later this year, in the 22nm E5-2600 V2 family, with up to 12 cores. The new chips will be built on Ivy Bridge technology and will offer up to 12 cores / 24 threads. The new Xeons, however, aren't really the interesting part of the story. Today, Intel is adding cards to the current Xeon Phi lineup — the 7120P, 3120P, 3120A, and 5120D. The 3120P and 3120A are the same card — the 'P' is passively cooled, while the "A" integrates a fan. Both of these solutions have 57 CPUs and 6GB of RAM. Intel states that they offer ~1TFLOP of performance, which puts them on par with the 5110P that launched last year, but with slightly less memory and presumably a lower price point. At the top of the line, Intel is introducing the 7120P and 7120X — the 7120P comes with an integrated heat spreader, the 7120X doesn't. Clock speeds are higher on this card, it has 61 cores instead of 60, 16GB of GDDR5, and 352GBps of memory bandwidth. Customers who need lots of cores and not much RAM can opt for one of the cheaper 3100 cards, while the 7100 family allows for much greater data sets."
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Intel Announces New Enterprise Xeons, More Powerful Xeon Phi Cards

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  • by SuricouRaven (1897204) on Tuesday June 18, 2013 @03:16AM (#44037019)

    The x64 Phi cards are a lot easier to program then GPUs. No need to jump through hoops with memory mapping, keep things in sync for SIMD processing or worry about running out of stack space when doing recursion.

    • by Anonymous Coward on Tuesday June 18, 2013 @03:36AM (#44037063)

      If you are an assembly junkie I guess you are right. But I rather prefer the implicitly vectorized CUDA programming model than having to use vector intrinsics by hand. If you want to avoid explicit data transfers take a look at (https://code.google.com/p/adsm/). Moreover, the performance of current Xeon Phi boards is not on par with Kepler GPUs. But, finally, NVIDIA is facing some competition.

      • by hairyfeet (841228)

        Correct me if I'm wrong but I thought Nvidia had joined in supporting OpenCL so things were gonna be heading in that direction?

        That said its probably smart for Intel and AMD (who i read will soon have their hybrid X86/ARM and ARM+Radeon chips out) to concentrate on the server space as X86 chips have been so insanely powerful for the last several years the consumer and SMB markets has more power than they know what to do with. The simple fact is the software just hasn't kept up with the hardware so you have

    • by mwvdlee (775178)

      How does the performance measure up to GPUs for TFLOPS/$$$?

      • by pla (258480)
        How does the performance measure up to GPUs for TFLOPS/$$$?

        If you need double precision FP, you don't have a lot of alternatives.

        If you only need single or half precision, the Radeon 7990 rates at 7x the TFlops for about 15% of the price.
    • by CSMoran (1577071)
      Does Intel's MKL support the Phis out of the box? It would be very convenient if, instead of having to re-write code for them, we could just use phi-capable BLAS and LAPACK.
        • by CSMoran (1577071)
          Excellent. Thank you.
        • by _merlin (160982)

          The "no-work" option is only useful if the bulk of the time in your code is in well-known algorithms that are implemented in Intel's library. Even going up to the "minimal work with Intel compiler" approach will require you to wrangle vector intrinsics manually to take advantage of these cores.

          • by CSMoran (1577071)
            Yes, "well-known algorithms" is my use case -- massive LAPACK generalized diagonalizations that take forever on a single CPU, almost forever when threaded with openMP-capable BLAS to, say 8 cores, and do not scale at all to distributed-memory clusters (ScaLAPACK with MPI) because the comms becomes a bottleneck.

            Thus I'm hoping for a solution where the vendor themselves wrangles those intrinsics in their BLAS or LAPACK implementation in MKL with me oblivious to all that mess. Assuming the computation time s
            • by _merlin (160982)

              Yeah, sure. I'm glad it works for your use case, and I'm sure it's great for a lot of others, too. Unfortunately it doesn't work for me - there will never be an off-the-shelf library for vol models developed in-house.

    • You won't get full performance from a Xeon Phi without using the SIMD instructions, so it is not as easy to program as you might hope.

      • ispc [github.com], OpenCL [intel.com], and LLVM on the way [haskell.org]. Failing that, you could of course use C++ and AVX intrinsics (which would be a good choice if you already have a load of SSE4/AVX optimised code lying about).
        • by Ottibus (753944)

          ispc, OpenCL, and LLVM on the way. Failing that, you could of course use C++ and AVX intrinsics (which would be a good choice if you already have a load of SSE4/AVX optimised code lying about).

          Having to use specialist languages like ispc to get performances does not support the claim that Xeon Phi is "a lot easier to program then GPUs". OpenCL is no easier to write on x64 than GPU and is arguably harder. And you certainly can't rely on LLVM (or any compiler) to turn your scalar code into high-performance optimised vector without a significant amount of work.

          So the original claim that "x64 Phi cards are a lot easier to program then GPUs" needs a lot more evidence before it will stand up.

    • by JanneM (7445)

      Here's a preliminary "best practice" guide: http://www.prace-project.eu/Best-Practice-Guide-Intel-Xeon-Phi-HTML?lang=en [prace-project.eu]

      Seems OpenMP and openMPI are both available, so typical hybrid systems should at least run out of the box, though you'll of course need a fair bit of tuning to make full use of the thing. It should be less work than adapting a system for running on a GPU though.

    • Whatever happened to AMD?
  • Will this be interresting for me? Price/value wise?

  • In addition, we'll see new Xeons based on this technology later this year, in the 22nm E5-2600 V2 family, with up to 12 cores.

    ...And yet, because of corporate policies on running the shittiest AV on the planet (Symantec) cranked to the max, my desktop PC will still have the responsiveness of a sloth on 'luudes.

    Seriously, I already have 8 cores worth of Xeon (2x4) and the load meter never even twitches, enough RAM to load my entire system drive into, and an SSD system drive. More cores won't help at t
  • by elwinc (663074) on Tuesday June 18, 2013 @07:25AM (#44037757)
    How many "Intel Inside" stickers will they be posting on Tianhe-2? I can see an a argument for a mere 16000 - one per node; 32000 - one per Ivy Bridge chip; and 80000 - one per Intel core carrying chip. But I think Intel's marketing dept should hold out for 3.12 million stickers - one per core!

    It's too bad Thinking Machines Incorporated never had a sticker policy, because the "Fat Tree" routing topology is straight out of TMI (the prior TMI topology, hypercube, didn't allow the customer as much choice to balance cores vs interconnect).

  • It's a gas! (Score:4, Funny)

    by Impy the Impiuos Imp (442658) on Tuesday June 18, 2013 @08:44AM (#44038191) Journal

    Xeon, Itanium. I think I've figured out the real genius at Intel.

    1. Pick a cool element.
    2. Remove a letter.
    3. ?????
    4. Profit!!!

    2015 Arbon
    2018 Heliu
    2023 Litium
    2024 Silion
    2026 Eon

"Stupidity, like virtue, is its own reward" -- William E. Davidsen

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