Forgot your password?
typodupeerror
Intel Hardware

Intel, Toshiba, Samsung To Form Chip Alliance 57

Posted by Soulskill
from the teaming-up-to-fight-doritos dept.
Lucas123 writes "According to a report from a Japanese news agency, semi-conductor leaders Intel, Samsung and Toshiba are forming a development alliance to halve the size of chip circuitry in order to create more dense NAND flash chips and more powerful processors. The vendors would not confirm the news report, but the Nikkei Daily said they hope to reduce lithography technology from the 20 nanometer size used today to something below 10nm. The news agency also said Japan's Ministry of Economy, Trade and Industry may fund up to half the project's cost, or roughly $61 million."
This discussion has been archived. No new comments can be posted.

Intel, Toshiba, Samsung To Form Chip Alliance

Comments Filter:
  • I read that "halve the size of the chip industry". Didn't they do that already when Hint and Opti left the chipset industry?
  • Alliance? (Score:5, Insightful)

    by nurb432 (527695) on Saturday October 30, 2010 @04:58PM (#34075250) Homepage Journal

    Or collusion?

  • Oh yeah? (Score:2, Funny)

    by Anonymous Coward

    I'm forming an alliance with Pringles, Frito-Lays and Doritos!

    • Re: (Score:3, Funny)

      by mrsteveman1 (1010381)

      Those 3 have been conspiring in secret to fatten my ass for the last 15 years. Nothing new.

      • Re: (Score:1, Funny)

        by Anonymous Coward

        Those 3 have been conspiring in secret to fatten my ass for the last 15 years.

        Their considerable success in that project bodes well for this new effort.

      • Those 3 have been conspiring in secret to thin my wallet for the last 15 years. Nothing new.

        That's probably what you wanted to say . . .

  • And a side-deal? (Score:3, Interesting)

    by sosaited (1925622) on Saturday October 30, 2010 @05:01PM (#34075266)
    An alliance of this sort most probably also means some price fixing deals already on the table. But if we get some decent capacity SSD's for reasonable price a bit sooner, for a few bucks more, I think its worth it.
    • by Tapewolf (1639955)

      An alliance of this sort most probably also means some price fixing deals already on the table. But if we get some decent capacity SSD's for reasonable price a bit sooner, for a few bucks more, I think its worth it.

      Maybe. For <10nm MLC flash, I'd be impressed if the thing still has data on it by the end of the day...

  • Going deeper submicron is all well and good, but it doesn't mean much to the place where I work. We're a MIPS house and can't use Atom. But there's chatter around the cubes about Atom getting a badly needed facelift, licensing an encryption CPU from some startup in Europe and maybe making Atom synthesizable - could affect us big time if Intel finally gets serious about embedded.
    • You want to embed x86?

      For real?

      Seriously?

      You're not just joking?

      • Not kidding in the slightest - any kind of synthesizable embedded CPU that could support x86 ISA would be HUGE. I've been hearing for a good 6 months now about Intel getting serious about embedded to stay competitive, and maybe buying MIPS or ARM. If they're going on a spending spree in 2011 and buy an embedded RISC house, that would impact us in a big, big way. The RISC approach will consume lots less power than Atom, and if they could add better HW security too (maybe the Europe startup?), they would beco
  • by noidentity (188756) on Saturday October 30, 2010 @05:29PM (#34075388)

    they hope to reduce lithography technology from the 20 nanometer size used today to something below 10nm

    Wouldn't this allow quartering the size, since you have this halving in both dimensions?

    • Re: (Score:3, Insightful)

      by Twinbee (767046)
      Whenever it comes to this kind of thing, it's always left ambiguous. I find that generally when people (even professionals) speak of 'half the size', they could mean in length, area, or volume (where applicable). Each of those of course gives entirely different results.

      I think personally the best idea is to use the highest dimension for the application. For example, when speaking of a 3D object, half the size would mean half the volume. Unfortunately, things like DPI don't work like that.
      • by bunratty (545641)
        Let's see... "Engineers are hard at work on new monitors with half the DPI of current monitors." Yeah, I see what you mean!
        • by slick7 (1703596)

          Let's see... "Engineers are hard at work on new monitors with half the DPI of current monitors." Yeah, I see what you mean!

          Let me see... "Indian Engineers are hard at work on new Chinese monitors with half the DPI of current Mexican monitors." Yeah, I see what you mean!
          There, fixed that for ya!

          • by bunratty (545641)
            No matter what nationalities you use, it doesn't make sense to work on monitors with half the DPI of current monitors, does it?
            • by slick7 (1703596)

              No matter what nationalities you use, it doesn't make sense to work on monitors with half the DPI of current monitors, does it?

              Of course it does. $$$$$

              • by bunratty (545641)
                Half the DPI? You think someone wants 40 DPI monitors? Hey, the 80s called and they want their 40 DPI monitors back!
                • by slick7 (1703596)

                  Half the DPI? You think someone wants 40 DPI monitors? Hey, the 80s called and they want their 40 DPI monitors back!

                  Of course it does, twice the monitors at twice the price. $$$$$ $$$$$

    • Re: (Score:2, Informative)

      by lordmetroid (708723)
      The size reffers to the length between transistors.
    • by EnsilZah (575600)

      Ha, screw that, we're halving our chips in the time dimension!

  • Yes! It's about time somebody formed their own chip alliance and stood up to Frito-Lay!
  • at puny attempt of competitors to create so called 'alliance.' Nothing can beat the mighty Apple! HA! Ha! Ha ha ha ha!!!!
  • Intel at it again... (Score:5, Interesting)

    by RocketRabbit (830691) on Saturday October 30, 2010 @05:44PM (#34075438)

    Intel is starting to feel the heat from ARM. Sooner than later datacenters will be running on ARM processors, and doing the same work per time unit at a fraction of the power cost.

    This is a new market that they wish to stomp on before it can get started.

    • by gtall (79522)

      Bingo! Intel has nowhere to grow right except though embedded processors. And ARM stands in their way. ARM will be tough to beat, not only because of their low power designs, but the way their licensing works. You can turn your business over to Intel, or you can keep it inhouse via ARM.

      • Re: (Score:3, Interesting)

        There is a certain amount of irony in all of this. When RISC was invented it was suppose to displace CISC because of better performance due to a more efficient architecture that used fewer gates. INTEL, AMD and other i86 vendors were able to fight back by using RISC internally in their micro-architectures. This succeeded because of the standardization and network effect based around the generic i86 platform. For example, the MIPS CPU and Sun's SPARC never succeeded on the desk top once the price performanc
        • Re: (Score:3, Insightful)

          by Wrath0fb0b (302444)

          So now INTEL and the i86 are facing intrusion from the bottom, because the ARM cpu is a RISC design that provides better performance due to a more efficient architecture with fewer gates AT LOW POWER CONSUMPTION.

          What are you talking about? ARM provides lower performance at lower power consumption.

          I work on high performance clusters (usually SGE/ROCKS not Beowulf, sorry guys) dedicated to physical and biological simulations and there is just no chance the ARM is taking over. We are pushing the bounds of our chips (all Nehalem-based Xeons) already, going to back to PIII-era performance would be a huge setback. There's just not a lot of competition with superscalar out-of-order x86-64, although specialized machines a

          • Re: (Score:3, Interesting)

            Oooh, I must have hit a nerve. First, read what I said:

            the ARM cpu is a RISC design that provides better performance due to a more efficient architecture with fewer gates AT LOW POWER CONSUMPTION.

            The key word here is efficient. Specifically I am talking about operations per watt. If some combination of heat dissipation and cost to run the system are limiting factors, then this kind of efficiency is important.

            I am not the only one who thinks this way. IBM has also made a system that chose lower power CP

            • There's not even the slightest chance that ARM will compete with X64 in servers in the medium term. Your fundamental argument ("it's CISC, not RISC") becomes ever more irrelevant withe each ML cycle since the CISC overhead is a constant (rather than a proportional) factor of the total number of transistors.

              I love my Nexus One too, but there are limits.
            • The key word here is efficient. Specifically I am talking about operations per watt. If some combination of heat dissipation and cost to run the system are limiting factors, then this kind of efficiency is important.

              But in the HPC world, the real limiting factor is the interconnect and the software interface. The interconnect latency determines how large of a job can finish in reasonable time, and is a fixed (high) cost per CPU. Meanwhile the software interface determines what off-the-shelf software will work with minimal investment. It's not worth spending programmer ($100k/year) or even graduate student ($40k/yr) time chasing a few watts when you have funding agencies expecting actual scientific results in the next q

          • In parallel applications the total performance per watt, among all ores, is what counts. Today, you can take a number of ARMs and equal the performance of the intel solution at a lower total wattage.

        • INTEL, AMD and other i86 vendors were able to fight back by using RISC internally in their micro-architectures

          This is a massive oversimplification. RISC and CISC chips used similar execution units, but RISC had simpler instruction decoders. With early RISC chips, this was a significant advantage because the instruction decoder took up an appreciable fraction of the die area and it meant that, with the same transistor budget, RISC chips could have a lot more execution units.

          This advantage became less pronounced over time, because the space needed for the instruction decoder was fairly constant, while the total t

    • Re: (Score:3, Funny)

      by TeknoHog (164938)

      Intel is starting to feel the heat from ARM.

      Wait, I thought heat comes from Intel, not from ARM.

    • No way to 'stomp' on it - embedded is bigger than PC and has been for a couple of years. So if Intel wants to fight ARM, they need to one or more of the following: 1. Make a 'synthesizable', power efficient Atom. I don't think they can do much about the power unless they completely recraft it, and then who knows what happens to x86 legacy apps. 2. Buy ARM, if they can afford it. 3. Buy MIPS, like I've been hearing for a while now. 4. Build up the sexiness of Atom with things like enhanced security (that's b
  • by edcs (1931354)
    Here's hoping Foxconn doesn't start the Chip Entente and start the First Nerd War.
  • Common Platform Alliance - IBM, Global Foundries (you know, the former fabs of AMD), Samsung. Chartered, now part of Global Foundries, was a member too.

    So, Samsung must be giving some kind of assurances to Intel they're not going to let ideas and techniques spill over into the Common Platform Alliance...

Real Users find the one combination of bizarre input values that shuts down the system for days.

Working...