It's all an attempt by these linux people to control the entire machine from the ground up. Don't trust them, they've let you down in the past.

So what's Sparc V? Swiss Cheese [sparc.org]? Sparc specs have been available for a LONG time.

If they make money with this and other chip fabricators get on the open source boat then perhaps one day we'll see an entire open source chipset and motherboard combo. No "SecureThisBIOS" and "TrustedThatOS" needed.. That would be damn sweet.

... really is this some sort of sick joke?

What's the roadmap from here for these open core processors? Is there one?

let the jokes about what sort of processor runs their webserver thread here...

This is indeed a good step for the Opencores project, but the subject itself is misleading.

The LGPL'd SPARC-compatible processor Leon [gaisler.com] was put to silicon a long while ago.

Give credit where credit is due, the Leon tracked over this territory years before OpenRISC.

>>Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products).

Flextronics would actually be best known for being the main manufacter of the Microsoft Xbox.

http://www.wired.com/wired/archive/9.11/flex.htm l

Here's the Google Cache: [216.239.39.104]

Project: OpenRISC 1000

Silicon Implementations

Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.

Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz.

The SOC features:

• OR1200 processor
• Memory Controller (FLASH, SDRAM, SRAM, DPRAM)
• PCI 2.2 32-bit interface 33/66MHz
• Ethernet MAC 10/100
• UART16550
• GPIO
• JTAG/Debug Interface

The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.

Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board. Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.

This board was the first prototype built (not fully assembled at the time)

Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock. Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.

Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor. IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.

I, for one, would like to see the open source community making open source chipsets, from the design, material, and the software to make it work. This is basically rebuilding the computer from the ground up, except with an open source backing of it. Why should major companies control the architechures that we are using? Although, the manafacteur of these chips may be a problem, but it would be very interesting to see electrical and computer engineers working on an open project to make a suprerior chip. This could, in fact, prove Moore totally wrong.

Or, I'm just being fanatical and ranting about nothing, whatever.

The development is naturally going to take longer for a finished product - nobody's going to release alpha (or even beta) silicon.
After all, you really don't want to have to submit a critical bug patch when the first mass run of chips is half-done... (Or the coder whose bug it fixes!)

How about the old VW sedan, especially the off-patent parts? Can an open-source automobile design based on, say, the 1980 VW sedan be set-up and evolved in poor countries?

In general, what problems would there be in creating open-source engineering designs for hardware of all kinds branched off from off-patent intellectual property? That, as it turns out, was the express purpose of the US Patent system as conceived by Benjamin Franklin, unless I am mistaken.

I guess I can see how this would appeal to the many /. readers who are very pro-Open Source. To me, though, this has a distinctly different application than that of Open Source software. Sure, people have loads of hard drives and other random computers to go installing all their *BSD/Linux, but how many people have the ability to produce these chips? In addition, many, many people have at least some coding ability that can be used to contribute to the Open Source software projects, but do that many people really have the ability to recognize mistakes on the circuit boards and actually fix them?

Just my two cents...

...their server is running off one of these since its already Slashdotted.

I didn't know open source had made it to real hardware; thanks slashdot.

Judging from the specs included at the linked site, this core compares favorably with CPU cores from ARM, NEC and others who make big bucks selling (and supporting) these cores for system integration. This is interesting, and it's maybe even more interesting that I haven't noted it in any trade journals (did I miss it, or has this thing been going on under the industry radar?)

However, it seems like the CPU core itself is open-source, while a lot of the bonus features on the SoC (System On a Chip) example cited are IP from Flextronics (the the company that did the physical design for this open-source CPU core, which was manufactured by UMC). I can't tell for sure because the site is slashdotted already. The links on PCI, JTAG etc. would presumably tell if all these IP macros (besides the CPU) are open source also -- does anyone know for sure?

Either way, the specs on the sample chip are interesting: SoC with OR1200 CPU implemented by Flextronics Semiconductor: 32-bit general-purpose microcontroller, UMC 0.18um fab process, maximum clock frequency of 160MHz. This SoC contains (1 each I assume): OR1200 processor, Memory Controller (FLASH, SDRAM, SRAM, DPRAM), PCI 2.2 32-bit interface 33/66MHz, Ethernet MAC 10/100. UART16550, GPIO, JTAG/Debug Interface.

BTW, 160MHz is pretty darn good, until you see that 160MHz is not really "MAX" as in "max (worst-case) operating conditions" as one usually specs these things. Usually, when a spec says "maximum clock frequency", it means that you can safely run the part at these speeds under the entire range of allowed operating conditions (temperature and voltage). It's rather meaningless to tell the fastest it canpossibly go (which would be 0Kelvin, with a voltage almost high enough to fry the cip), so wpecs tend to tell you the max safe speed.

That would be the highest temperature (usually ~70C, but it's really based on the junction temp, which is calculated from ambient temp, airflow, and package thermal characteristics -- higher than 25C in any case, since that's usually called "typical"), lowest voltage (usually nominal minus 5% or 10%; so for 3.3V system, worst case voltage would be 3.3-0.33=2.97V, for 1.8V core it would be 1.62V), and slowest process from the fab (whther this is the case or not is unspecified in the list). Instead, lower down the page I see:

Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core

I could take a wild guess and say the thing would run at least 125MHz (respectable for the tech at hand), so calling it 160MHz (but not at worst-case conditions) is a little odd, or at least non-standard. If it were a "normal" industry player quoting me a part's clock rate that way, I'd become very, very suspicious of them for the rest of the negotioations.

It's still way cool, and if those IP cores are all available open source also, I'm really excited. But, I still have a lot of unanswered questions that I expected to see at least a brief mention of:

• Is a hardware/software co-simulation environment available?
• If so,what simulators and languages are supported?
• What support model(s) are available for design teams considering this core?
• What is the die size for the SoC made by Flextronics?
• How much is Flextronics selling these SoC's for, or are the ASIC (customer-specific)?

I guess I could do as the article suggests and call or email Flextronics:

Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.

... but I don't think they'd appreciate those sorts of inquiries from an employee of a competitor :)

Chuck Moore [colorforth.com] has been doing forth chip design for a while. His chip design software and Forth development system is public domain, but he hasn't Open Sourced his CPU designs yet. What makes his designs important IMHO is that they are very simple compared to conventional chip designs-which makes them appropriate for things like very low power consumption and makes it possible for one person to understand/implement their design.

Part of what makes Open Source hardware important is that Open Source designs are what will actually be implemented as small scale manufacturing [ennex.com] becomes more practical. There are various proposals around for doing manufacturing of chips using rather different processes than we are used to today(i.e. "growing" chips in a chemical medium). What these ultimately take us towards is robotic infrastructure that can be remotely controlled and is as "self-replicating" as a lathe or a blacksmith's shop.

Before everyone sings the praises of Flextronics, keep this in mind:

Flextronics also makes the famous XBox for Microsoft in their Guadalahara Mexico facility. I just listened to a special on NPR about globalization and NAFTA and an economist was saying that without NAFTA the XBox would cost $400.

Your Cisco routers would probably cost more too, but I'm not sure if the cheap prices are worth it for the loss of US jobs.

maybe im missing something here, but i dont see how open hardware could ever be as successful as open source software. why? because the hardware required to build software (ie: a computer) is a commodity in most of the developed world. how many people own machines capable of producing microchips?

i always felt that the power of open source lies in the fact that if you know how to program, you can make changes to the software yourself. now if i somehow got a hold of a schematic for my processsor and managed to improve the design, how would i go from paper to silicon?

Hardware Modo: Measure Twice. Cut Once. Software Modo: Release Often! Software is more conducive to Open Source development... Non?

guys,

while i'm sure the opencores crowd has done an outstanding job, you need to look further at the Big Picture.... and comparable processors.

a motorola ppc8245 at 300MHz is $19 in qty (at least that's what we pay). it has all of the features enumerated in the article above (16K caches, PCI, MMU, ethernet, dual UARTs, etc etc etc), and is supplied replete with a Big DataBook of We're Pretty Damn Sure This Will Work Knowledge and 10e6 embedded programmers worldwide. not to mention an entire library of (linux AND powerpc) Google entries. you can attach all manner of BDM/BDI/JTAG debuggers (e.g. BDI2000) to an 82xx and there are a half dozen compiler suites (including gcc) to choose from. boundary scan routines are already understood and implemented, which eases ICT development at production time. if it's 2AM the day before the Big Pitch to the client, i'm pretty sure i can find someone who's awake and can fix my 82xx register access problem. i'm no motorola bigot (i always try to make a PIC fit until it can't do the job) but the economies of scale are WAY WAY WAY against the little guy when it comes to microprocessors.

you are not selling your soul to moto for $19. you are making a cost effective, performance increasing, risk reducing decision, that's all.

just another datapoint.

This is the future, i was shizoiding about in posts time ago.
I use Xilinx FPGAs, which are both cheap and super powerful. For the company, i am woring for, i am developing digital signal poccessing processors and software for them using FPGA. one twenty dollar FPGA can process extremely high-order filters and analyzers on samplerates as high as hundred MHz, which we use for microwave communication in extremely baad environments.


With my addiction to open sources i am on developing a open-hardware computer (for a long time already)and will put online all sources, schematics, cerbers, layouts, so any Geeky guy (or Woman -- Jennifer E. Elaan? sorry if i am wrong) will be able to put together one, or buy components and ask somebody who can.


You would say You might need license for buying FPGAs used in by militaries for missle targeting (yes!) - then You would would be right. However there are no problem to by those in russia or anywhere else without having any license.


So hold on for a home-brew computer era coming back (from the times we were assembling Sinclair ZX Spectrums 16k and 48k at our homes:). How those computers will reincarnate from tv-calculators to plaforms being able to "process" (remove:) macrovizions, copyright bits on multiple streams, as well as directly capture satellite broadcast and process it.


Only drawback is that it will be with its own OS - BrainOS i am working on at te time. Just because it will be programmed not in sequential language, but parralel (VHDL) as it will be embedded in hardware (however modifiable by user at any time -- fpga!). We should be ready about that we could not (legally:) build any x86 on it, as we will have no license from intel. But i don't miss them. For running old x86 software and games we can use old x86 computers, which are widely available in trashmarkets.



asap i will try to do some artickle on this and try to post it there, that we could discuss what is ood and what is not).. Leave me some personal message if You are interested in it, so i could see how many of us are interested in this project. I hope it to be the same as linux is for software world, it could be for hardware world.