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Hardware Technology

Melting Microchip Defects May Extend Moore's Law 99

Posted by kdawson from the moore-the-merrier dept.
schliz lets us know about research out of Princeton on melting away defects on microchips using a laser. The new technique, termed Self-Perfection by Liquefaction (SPEL), was published in the May 4 issue of Nature Nanotechnology. Researchers have traditionally approached chip defects by trying to improve the microchip fabrication process, but this eventually reaches fundamental physical limits to do with random behavior of electrons and photons. By focussing on fixing defects, the new method enables more precise shaping of microchip components, and engineers expect to dramatically improve chip quality without increasing fabrication cost. The before-and-after images are remarkable. Here's a diagram of how the process works.
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Melting Microchip Defects May Extend Moore's Law More

Melting Microchip Defects May Extend Moore's Law

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  • Before and after pics (Score:5, Funny)

    by tgd ( 2822 ) on Tuesday May 06, 2008 @07:05AM (#23310486)
    Whew yeah, those are amazing. World-changing, even.

    What am I looking at?

  • Sharks (Score:4, Funny)

    by adpsimpson ( 956630 ) on Tuesday May 06, 2008 @07:06AM (#23310490)

    Where do the frikin' sharks come in to it?

  • Is that image in actual size or what?
    162*169?
    Very strange indeed.

    • Is that image in actual size or what? 162*169? Very strange indeed.

      The pictures show up larger in the linked article.

    • Re: (Score:1, Informative)

      by Anonymous Coward
      It WAS the thumbnail -- all better now. Princeton's Web team swapped the file to make the link work.

  • Better Before and After (Score:4, Informative)

    by Garganus ( 890454 ) on Tuesday May 06, 2008 @07:16AM (#23310584)
    better link: http://www.princeton.edu/pr/pictures/a-f/chou/ [princeton.edu]

  • Not really fixing... (Score:5, Insightful)

    by emj ( 15659 ) on Tuesday May 06, 2008 @07:18AM (#23310598) Journal
    I was imagining a laser doing touchups on really bad places of the chip to remove shortcircuits and stuff like that. But this seems like another step in the process of making chips.

    A bit like drying pulp to get paper.

  • Anonymous Coward (Score:3, Funny)

    by Anonymous Coward on Tuesday May 06, 2008 @07:19AM (#23310604)
    Scientists really need to stop using lasers to fix microchips and start using them for something practical.

    For instance, death rays.

    • Re:Anonymous Coward (Score:5, Funny)

      by Culture20 ( 968837 ) on Tuesday May 06, 2008 @09:01AM (#23311494)

      Scientists really need to stop using lasers to fix microchips and start using them for something practical.
      Popcorn?
    • Yeah, I read the title as 'Melting Microsoft ...'. Oh, well.
    • Possible peacetime uses of military technology (from Laurie Anderson's "Home of the Brave," from memory)

      1. Jump starting your pickup truck from outer space

      2. Lighting your girlfriend's cigarette with lasers from orbiting space stations

      • Re: (Score:2)

        by dgatwood ( 11270 )

        Careful with that last one. One little miscalculation and boom! No more girlfriend.

        Of course, since this is Slashdot, we can probably assume the girlfriend didn't exist before the laser blast, either.... :-)

  • The described process seems to bring essentially correct structures into a more regular shape by melting them and letting surface tension do the rest.

    I doubt it could fix a "real" defect, like two neighboring structures that were fused by accident during manufacturing.

    • Re:Misleading title? (Score:4, Informative)

      by teslar ( 706653 ) on Tuesday May 06, 2008 @07:52AM (#23310824)

      I doubt it could fix a "real" defect
      Irregular shapes are a "real" defect. From the first paragraph of TFA:

      even tiny defects in the lines, dots and other shapes etched on them become major barriers to performance
      • Performance? So the chip would fall into a lower speed category but still be usable.
        I define "real" defects as "does not work at all".

        • Re:Misleading title? (Score:5, Insightful)

          by cowscows ( 103644 ) on Tuesday May 06, 2008 @08:38AM (#23311252) Journal
          Then you're much more forgiving than most people.

          If a chip is designed to run at a certain speed, but manufacturing flaws make it run slower, then it a very real sense the chip didn't work. The fact that it still is possible to use the chip for some things doesn't mean that it's not broken.

          I once rode home a bike that had one of the pedals broken off. It took longer than usual, because I was travelling at a lower speed, but by your definition my bike didn't have a defect. In my opinion, a missing pedal is pretty darn broken.

  • Fake !!! (Score:3, Funny)

    by daveime ( 1253762 ) on Tuesday May 06, 2008 @07:22AM (#23310626)
    How much funding do these people get ?

    It's obvious they've just used the BBC testcard and Photoshopped out the girl, clown and blackboard.

    http://www.bbc.co.uk/cult/classic/classic/images/640/testcard.jpg [bbc.co.uk]

    Stands out a mile, obvious fake ... the original was bigger than 162 x 169 pixels also ;-)
  • Someone who understands both should comment on how similar this process is to annealing.

    • Re: (Score:3, Informative)

      by bhima ( 46039 ) *
      As I understand annealing it removes internal stresses created by uneven heating and cooling. This process smoothes etching or deposition defects.

    • Re: (Score:2, Funny)

      by phreakhead ( 881388 )
      What about CowboyAnnealing?

  • quick explanation (Score:5, Informative)

    by anmida ( 1276756 ) on Tuesday May 06, 2008 @07:47AM (#23310784)
    I'm a materials scientist, so hopefully I can explain this quickly for you all :)

    The images that are given (before and after) are some scanning electron microscope images. Think optical microscope except with electrons. Anyway, there is a serious improvement in the structure - the edges are a lot cleaner and more defined. This is a really simple and beautiful way of letting Nature do the hard work for us. What this is doing is liquifing the material and letting surface tension pull it into the lowest-energy configuration (least amount of surface area locally).

    It's really a neat way of doing it, because fabrication is really tough - uses either chemical etching or some method of particle bombardment to remove atoms. There's a big trend in matsci to build down, and build up, at the same time at the nanoscale. Think of this as the "error-correction" process after fabrication.

    --This is not the same as annealing - annealing is a solid-state process, putting energy into the material to enable atoms to move and remove stress and other small defects from the material.

    Hope that helps :)

    • Re: (Score:2, Interesting)

      by Anonymous Coward
      I see some major issues with this in real world semiconductor manufacturing. They are depending on the surface tension of the molten liquid to straighten the lines. You will need very specific materials for this - the commonly used materials such as photoresists and dielectrics used to generate the patterns do not melt - they vaporize. The bottom surface has to be extremely "hydro"phobic (or phobic to the material).

      You could possibly use a metal. The only metal that can be melted and patterned - Aluminum, i
      • quote from article:

        Simple melting by direct heating has previously been shown to smooth out the defects in plastic structures.
        This process can't be applied to a microchip for two reasons. First, the key structures on a chip are not made of plastic, which melts at temperatures close to the boiling point of water, but from semiconductors and metals, which have much higher melting points.
        Heating the chip to such temperatures would melt not just the structures, but nearly everything else on the chip. Se
        • maybe they'll extend this First Proof-of-concept to the 45nm scale, but their demo. is already at 70nm (lines) and 50nm (dots).

          the lines demonstration is a big deal to Intel's optical waveguiding, as it'll reduce the sidewall scattering loss of the waveguides considerably. I'd imagine the dots would be great for transistor gates.

        • Re: (Score:2)

          by kesuki ( 321456 )
          "The structures need to be melted for only a fraction of a millionth of a second,"

          wow and i thought I was fast.... TFA suggests that 'correction' could be automatic, although they used an electron microscope to fix chips, I'm guessing that the laser could simply be provided with the chip map, fire the laser along the parts that need to be fixed to make the chip work, (with the quartz either touching the chip, or slightly above it, the slightly above it making the lines narrow and tall a desirable trait for
    • It may not be the same as annealing, but it does seem very similar in that you are adding enrgy to the material in the form of laser light and allowing the atoms on the chip to move and in the process correct defects in the material structure.
      • I'm guessing the main difference is that the laser causes very localized surface heating rather than isotropic heating throughout the sample.

        Also, this process is beautifully simple. We do this in my field, too, but using polymers in almost exactly the same process. I haven't seen a picture in my field nearly as convincing as the SEMs in this project, however.

  • Silicon reflow (Score:1, Insightful)

    by Anonymous Coward
    So this kinda feels like solder rework but on die with semiconductor instead of solder. Silicon reflow.
  • The final link in the summary shows a diagram of how it works. The second 'capped' example shows a load of messy green lines that have some rather neat blue lines placed over the top of them to produce some red hot neat lines that cool to form nice neat green lines.

    Rather than doing all that, whatever process they used to make the nice neat blue lines should be used to make the green ones in the first place.
    • The article describes those blue lines as a quartz plate that sort of shapes the melted microchip parts. I think the blue strips in the one part of the diagram are more of a graphic simplification for visual clarity rather than a drawing meant to show an entirely realistic diagram of what is going on. I wouldn't think it particularly easy to make strips of quartz that tiny, not to mention properly align them over equally small transistors and stuff beneath.

      But even if it is possible, maybe the techniques us
    • the problem is the "green ones" are Silicon crystal, meaning they are part of the same crystal as the substrate and thus semiconductor (which you can make diodes/transistors out of).
      The blue ones are glass (quartz), a highly resistive dielectric, which you can only make resistors out of.
      The end result must be that the semiconductor (or metal i suppose) is smoother.

      I haven't found the original paper, but i'd guess they wafer bonded the Si substrate and quartz plate.
      To Stoofa's point, i do wonder why the quar
  • ... but made with lasers!

    How cool is THAT?

  • I'm impressed (Score:4, Funny)

    by the eric conspiracy ( 20178 ) * on Tuesday May 06, 2008 @08:20AM (#23311056)
    They spelled liquifaction correctly.

  • Build - Debug - Analyze (Score:5, Funny)

    by Thanshin ( 1188877 ) on Tuesday May 06, 2008 @08:34AM (#23311206)
    Finally, the CS way of developing is extending to other areas.

    Soon architects will quickly make ten buildings without much previous study, then sell those who don't fall in the first two weeks with the promise that if some fall in the first five years, they'll release a v2.0 shaped as the ones still standing.

    I can almost see the changelog:
    "v1.5.1142 - The coming of winter discovered a weakness against rain in paper roof. New ice roof installed."

  • Er um, maybe not so much (Score:4, Interesting)

    by Ancient_Hacker ( 751168 ) on Tuesday May 06, 2008 @08:36AM (#23311234)
    Er, this looks really keen, but you have to consider the downside. Yes, there is a downside.

    When fabricating chips, yes, you do want nice clean lines. Whopeee for clean lines. All hail clean lines. By coincidence, surface tension works towards cleaning up lines. Somebody should have patented surface tension. Too late now.

    But eventually the nice clean lines end up at a transistor or resistor. There the rules are very different. You don't want surface tension to do its thing on the end of the line, which would be to shorten it. Very conveniently these nice pictures don't show what happens at the end of each line. How convenient.

    • Re: (Score:2, Insightful)

      by GanjaManja ( 946130 )
      But also, the nice part of their process is that you can direct the lasers to certain areas of the chip.

      I agree they should show the ends, but you could possibly use the directed laser pulse to stay away from the terminals.

    • Re: (Score:1, Informative)

      by Anonymous Coward
      Jesus, could you try to sound less smug when making an insightful comment. You raise a good point, but "How convenient" just makes you sound like a prick.
    • Yes, it'll shorten them. But if you take that into account when etching them in the first place, they'll shorten to the exact length needed. So shortening isn't a problem.

      However...

      Chips are made by building up layers that aren't all necessarily at the same height. So when it comes time to put a new layer down, the question becomes 'how do you only melt the top layer in contact with the shield, and not the bottom layer you already melted once?

    • Re: (Score:2, Insightful)

      by Anonymous Coward
      Yes, if only you had a precision optical heating device which could be masked off to only cook the long wires, and skip the transistors. Such as a high energy laser, as described in the article.
  • Hang on a second. A little random wiggling in a "wire" does no real harm -- it lengthens the path a little, maybe introduces a little more heating, but the electrons still go where they're supposed to.

    The problem comes when the random wiggles cause two wires to touch, creating a short. Then you've got an actual dead chip.

    But if this self-perfection thing works the way I think it does, it should cause that "bridge" to become stronger, just as two drops of water on a window merge when they touch.

    Doesn't sou

    • Re: (Score:3, Insightful)

      by N1ck0 ( 803359 )
      The issue is that in smaller conductor fabrication sizes the little wiggles do make a difference. The flaws in fabrication causes small variances in current and electrons to 'leak', this makes fabricating a 45nm chip so much harder then a 90nm chip. So by straightening the conductors you can make that 45nm chip easier to produce reliably, and also push the boundaries to make even smaller chips.
    • actually, the roughness would cause electrons (or holes) to recombine or otherwise get lost at the surface defects, and (as you said) increase the heat while decreasing the current, in general requiring more power and generating more heat, all bad I think.

      So it's still good for wires. You can see their wires are only 100nm apart, without touching.

    • Re: (Score:2)

      by geekoid ( 135745 )
      Not quite correct.

      Buses need to all be the same length, longer wires change how long an a signal takes. You are talking about some very, very short periods of time. And the are getting shorter. Also a loose wire will break as the vibration of the machine keep wiggling it.

  • I can tell you that reworking products takes three times as long, and therefore costs three times as much money, as doing it right the first time. This is because you have to build the defective product the first time, detect the defect, and repair the defect. The time and money spent on this research is better spent on getting the original manufacturing process under better control.

    Don't blame me. Deming [wikipedia.org]said it first.

    • Re: (Score:2)

      by fbjon ( 692006 )
      AFAIK, in this case, getting the manufacturing process under better control implies getting the laws of physics under better control.
      • See the "Seven Deadly Diseases [wikipedia.org]" section of the link I posted above.

        4. Excuses, such as "Our problems are different."

        Getting the laws of physics under control is part of any manufacturing process.

        • Re: (Score:2)

          by fbjon ( 692006 )
          The point is that you can't control the laws of physics, only understand and work around them.

    • Re: (Score:3, Informative)

      by J.R. Random ( 801334 )
      This isn't a matter of detecting defects and fixing them. It is a matter of applying a finishing step that improves the whole chip at once. You can be sure than chip manufacturers try very, very hard to get things right the first time. But if you read the article you would know that there are basic physical processes that make a certain amount of randomness and jagginess inevitable, which the laser process fixes.

    • Re: (Score:1)

      by amh131 ( 126681 )
      I think the idea here would be to make this a standard part of the manufacturing process -- don't attempt to detect which fab steps have defects, just zap them all with a short pulse in an attempt to regularize the current patterning. Heck, maybe you'd even leave the mask in place! Or, more likely, make up a new mask so you only remelt regions that can benefit. That would certainly add to manufacturing cost (masks are expensive) but probably not even to the degree that planarization did.
  • Now! From electronic researchers at the Princeton University, comes... Self-Perfection by Liquefaction! (public oohs)

    Testimony: "I was a lousy CPU, i overheated and it was exhausting. But when I tried Self-Perfection by Liquefaction, my life changed".

    (Shows picture of before / after)

    (public wows and applauds)

    And this perfection can only be yours by the mere price of ... not 1,000, not 500, not 100, but a mere $9.95!

    CALL NOW!

  • Very Very Impressive (Score:5, Interesting)

    by Anonymous Coward on Tuesday May 06, 2008 @09:16AM (#23311632)
    One of the major problems with getting linewidth (and thus line separation) down in the photoresist process is the problem of dielectric breakdown. Charge builds up at the irregular surface and if two points on different conductng lines are near one another they will arc across and the chip will be useless (same reason arc lamp electrodes are shaped as needles). This process seems to remove the irregularities, which should allow chip fab units to lay down pathways closer together. Note even the square spots get round(liquids form spheres to reduce surface area) which reduces the tendency for breakdown to occur. If nothing else could allow for the use of lower dielectric packaging, and make things cheaper.

    Really cool.
  • Moore's Law reminds me of Weird Al Yankovic. Every few years, someone proclaims that it's making a "comeback". The reality is, of course, that Moore's Law was never gone in the first place.

  • This obsession with "Moore's Law" is detrimental to accurately judging semiconductor progress. It's an arbitrary and irrelevant benchmark.

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