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IBM's Transistor Data Revealed

Posted by kdawson on Tue Jan 30, 2007 04:00 PM
from the spoiling-the-timing dept.
Atryn writes "After last week's story — Intel and IBM both announcing breakthroughs in chip design enabling continued adherence to Moore's Law — many folks wondered how and why the two companies' announcements came out simultaneously. The Register explains it, and as a bonus they are releasing a leaked copy of IBM's future research documentation (PDF)."
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[+] Intel, IBM Announce Chip Breakthrough 112 comments
Intel announced a major breakthrough in microprocessor design Friday that will allow it to keep on the curve of Moore's Law a while longer. IBM, working with AMD, rushed out a press release announcing essentially equivalent advances. Both companies said they will be using alloys of hafnium as insulating layers, replacing the silicon dioxide that has been used for more than 40 years. The New York Times story (and coverage from the AP and others) features he-said, she-said commentary from dueling analysts. If there is a consensus, it's that Intel is 6 or more months ahead for the next generation. IBM vigorously disputes this, saying that they and AMD are simply working in a different part of the processor market — concentrating on the high-end server space, as opposed to the portable, low-power end.
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  • Summary... (Score:2, Insightful)

    IBM got wind of Intel's announcement and rushed out their own. The end.

    I was skeptical that there really were people who saw them and wondered "Wow, engineers in both companies made these discoveries today?", but a look at the Slashdot story shows the first comment (in my display, anyway) asking "Two breakthroughs in one day?" (Score:5, Insightful)

    • IBM, Intel, it doesn't matter.

      When am I going to get something the size of an SD card with processor (ARM, >=200MHz), RAM(>=128M), sound(16 bit full-duplex), video (1024x768x24bit), a nice-sized flash HD(>=2G), and contact-headers for IDE & USB ports?
  • by Lithdren (605362) on Tuesday January 30 2007, @04:14PM (#17818492)
    Intel developed a time travel device and sent a robot back in time to steal the plans from IBM.

    And they tried to kill Bill Gate's mother, but you'd be suprised how difficult that was.

    You'd think 640 rounds of ammo would be enough to kill anybody.
    • You claiming John Titor [wikipedia.org] works (well, will work) for Intel? That would certainly explain a lot.
      Next thing you know we will find out that IBM has had this technology for a while and even used it in the 5100. [wikipedia.org]
  • by namityadav (989838) on Tuesday January 30 2007, @04:14PM (#17818496)
    From Intel: High-K Material is a material that can replace silicon dioxide as a gate dielectric. It has good insulating properties and also creates high capacitance (hence the term "high-k") between the gate and the channel. Both of these are desirable properties for high performance transistors. "k" (actually the Greek letter kappa) is an engineering term for the ability of a material to hold electric charge. Think of a sponge. It can hold a lot of water. Wood can hold some but not as much. Glass can't hold any at all. Similarly, some materials can store charge better than others, hence have a higher "k" value. Also, because high-k materials can be thicker than silicon dioxide, while retaining the same desirable properties, they greatly reduce leakage.
    • by exley (221867) on Tuesday January 30 2007, @04:27PM (#17818650) Homepage
      No. The substrate that these chips are fabbed on is still silicon. The article is somewhat misleading because it's the gate oxide, which is typically made of silicon dioxide, that's being replaced with the hafnium-based high-k material. I'm loathe to site this as a source but since it has pictures, here [wikipedia.org] is a Wikipedia article that will show you the basic structure for anyone unfamiliar.

      I also find it interesting that they are using metal gates instead of polysilicon, considering that metal gates were used in the olden days before the switch to poly.
      • Uh, the GP never made any claims about the substrate. In fact, GP specifically stated this is the gate dielectric that's being replaced.

        So, your statement of "no" makes no sense, because you're agreeing with the GP.

        Oh, and the reason they're using metal gates instead of poly, can be found courtesy of RWT, last paragraph of the following link

        http://www.realworldtech.com/page.cfm?ArticleID=RW T012707024759&p=3 [realworldtech.com]

        Since polysilicon is not compatible with Intel's high-k material, the newer 45nm transistors us

        • > Uh, the GP never made any claims about the substrate.

          The article implies that hafnium is to supplant silicon entirely. The subject line " Silicon Valley will become K-Valley then?" implies something similar.
      • I'm curious to know where this leads though. As I understand it one of the largest reasons for abandoning widespread use of GaAs semis was that there was no analog of SiO2. If I am reading these releases correctly, it's the SiO2 that's being replaced by the Ha. So if this is correct, wouldn't a GaAs system using the same methodologies be "doable"?

        Forgive my newbie-ness, fab tech isn't my strong suit.

        Maury
    • Re: (Score:3, Funny)

      by Anonymous Coward
      Think of a sponge. It can hold a lot of water...Glass can't hold any at all.

      Try holding the glass right-side up.
    • That's Potassium Valley to you!
      • Re: (Score:3, Informative)

        Despite the fact that you decided to go troll on us with how you responded to the parent post, I'll bite since this was something I got to thinking about as well.

        Higher gate capacitance means that you can get more charge in the channel for a given gate voltage (Q=CV). This can give both higer currents and a reduced threshold voltage, which are good things.

        But higher capacitance, of course, slows things down when you get to thinking about those RC time constants. So, do the benefits of higher capacitance o
        • by Umbrel (1040414) on Tuesday January 30 2007, @05:20PM (#17819408)
          The improvement is not about increased capacitance in each transistor channel, that would be bad. The capacitance is scpecifically increased in the gate, that means that the gates can be made thicker (less leakage currents = less power consumption) while keeping (or improving) the values for current and voltaje needed to be applied at the gate and the time for the transistor to switch.
          • Re: (Score:3, Informative)

            The gate itself isn't inherently capacitive, it's the capacitance of the gate/oxide/channel structure that we're talking about, so you can't decouple gate capacitance and channel capacitance. Charge on the gate (which you can think of as the top plate of a parallel plate capacitor) results in equal but opposite charge on the channel (the bottom plate, with the insulating oxide acting as the dielectric).

            You are absolutely correct that the point in increasing the thickness of that oxide is to reduce leakage
        • The high-k material doesn't necessarily mean the capacitance of the gate will be higher, that depends on the dimensions of the gate as well as the material. If the thickness of the dielectric was kept constant the cap would go up, but what we're trying to do here is increase the dielectric thickness while maintaining performance. By increasing the dielectric thickness we can put a stop to the quantum tunneling that creates gate leakage. If we did this using the same Si02 gate dielectric it would cause an
          • Um, by definition the gate _capacitance_ is part of the RC network. The grandparent is right in that if Tox was kept constant then the RC delay would go up.
            • Right, I was going to say just that before I saw your post. I'm guessing that the capacitance of the interconnect dominates over the gate capacitance in the RC delays? I'm used to the low-speed analog world where we don't worry as much about our interconnect in terms of self capacitance.
  • Well, wouldn't you know it, we just happen to have acquired a rough version of that very presentation. Geeks out there can read up on IBM's breakthrough ahead of time via this PDF [regmedia.co.uk] - a Register exclusive.

    Doesn't it suck when someone messes with your timing?

    IBM deserves a bit of a jab from the folks at Register whom they fooled for a few days with their "paper release" technology.

  • Why Adhere? (Score:5, Insightful)

    by camperdave (969942) on Tuesday January 30 2007, @05:50PM (#17819964) Journal
    ... enabling continued adherence to Moore's Law

    I don't understand why you would want to adhere to Moore's law. If I were able to make chips 10 times denser, why would I not market that right away rather than waiting for 3-5 years needed to follow the law.
      • Re: (Score:3, Insightful)

        Moore's law is not a law of the universe. It is merely an average rate of development of an industry. It's like saying cars are 2% more fuel efficient each consecutive year. It wouldn't break any law of the universe to suddenly release an SUV that was 10% more fuel efficient than last year's model.
    • Re: (Score:2, Funny)

      See Swann vs. Edison. Swann demonstrated first. Edison had a personal PR department.

      It's all about the marketing. However, in that case the battle was asymetrical, not just in marketing, but in time to market. Having shit on the shelves with your name on it is marketing that's pretty hard to trump.

      KFG
    • It is pretty clear that IBM is desperate. Intel has a ton of momentum, and they have to be stopped somehow

      No. Yes. No.

      IBM being six months behind Intel in 45nm tech is pretty meaningless unless Intel uses it to somehow grab more Itanium share, which is unlikely. Other than in Power vs. Itanium they're not direct competitors, and even in that arena, it's like calling the Corvettes and Ferraris competitors. Sure, you may end up buying the other thing, but only if you drastically alter your expectation

    • Re:Isn't it obvious? (Score:5, Interesting)

      by ivan256 (17499) on Tuesday January 30 2007, @07:44PM (#17821666)
      It seems more likely to me that they're both announcing this "new technology" around now for a different reason.

      The first US patent to mention the use of a hafnium oxide as a dielectric [uspto.gov] expires later this year.