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Hardware

More Transmeta Rumours 54

Posted by CmdrTaco from the fleetwood-mac-stuff dept.
id writes "JC has some rumours about Transmeta including one that suggests that the chip will be software upgradeable, so new instructions could be added at a later date to keep pace with other vendors " Most of it is stuff we already know, but it notes that the chips will be expensive, even though they will be cheap to produce, as well as talking about it being software upgradable.
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More Transmeta Rumours More

More Transmeta Rumours

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  • Moreover, the IBM ESA/390 (G5) executes complex instructions in "millicode." Opcodes are mapped to addresses containing the millicode specification of the instruction. But the kicker is, every opcode is assigned an address. It's just that most of them are empty and the instruction executes natively. It's possible to upgrade the millicode on-the-fly (while the machine is running) to patch bugs. You could think of using this to completely re-map the instruction set.

    This information is taken from a presentation on the G5, so I don't have the complete story. Please post corrections if necessary.

    This has been possible for some time (possibly as far back as the 360, but I'm not sure). Transmeta is certainly not the first.

  • > AMD matches the performance but doesn't offer enough cost savings to deliver the TKO punch.



    I'd thought it was the other way 'round... AMD is significantly cheaper than Intel, and offers far better price/performance in the mid-range, but doesn't have anything that can match the fastest Intel chips in sheer speed.



    If the K7 lives up to its hype, it'll change that. Hopefully it'll change it without inflating AMD's prices... Xeon performance at Celeron prices is definitely something I could get into... :)

  • See subject; Rebooting will almost certainly be needed; Until this article it was thought that actually replacing a chip would be needed.
  • ...remember the "I think you'll want one" quote, one of the few things they're allowed to say?
  • Behind the reprogrammable translation layer (which is NOT a FPGA), it's all standard hardware. There are a few neat things they do for speed, too.

    That's how I understand things, at least; Hardware's out of my field, so perhaps you'd be better reading the thing yourself (and associated Slashdot comments).

  • Speaking from a technical point of view, Re: the upgrading.

    Upgrading the microcode is nothing new, Intel have been doing it since early Pentiums, as have Alpha's too (AFAIK). This is fine and dandy, a good way of fixing those little bugs that crop up. However...

    The purpose of microcode is to set the control paths in the microprocessor, it does not however allow you to add any major new functionality to the processor - that can only be done using new function units. The best you could do by changing microcode is string together a series on existing functions to make a new "macro" function as it were.

    To upgrade the functionality of the processor as the artical describe probably requires some form of reconfigurable logic. This is similar to what I have planned for my next few years work ;-)

    I'd be very interested to know if the author of the artical heard about the microcode upgrade and made a leap to adding (for example) 3D graphics instructions, or the other way round.

    -- Michael

  • Well, I don't for certain, but I'm pretty sure that's the limitation of the microcode patches in the Pentium series, although I'm more than willing to be corrected!!! :-)

    When you say small, how small? I've very much like to know - if you have a bit of text then let me know. But I stand by my original belief that microcode upgrades can only fix the control algorithm in the processor. So while that gives you a little scope for upgrades, you certainly can't add functionality like completely new instructions.

    Part of the problem is that Intel don't publish this info for the average person - and quite rightly too - the last thing you want is some fool to make a virus which fried your chip!

    I've trashed my bookmarks recently, but I'll see if I can find the web page where I did manage to find the info. In the meantime, sorry if I sounded harsh in my original comment (deadlines and I go on holiday tomorrow!!! :-)

    -- Michael

  • As I've said below (in another post), I don't think this is what they mean - but even if you can upgrade the instructions, I think this would be a little too large an operation to fit in a single instruction!!! However, security checks will be needed, as you will almost certainly bypass normal OS security checks.

    Some extenable OS's (which allow users to load code into the kernal for speed/upgrade reasons) have already addressed this issue by only allowing the OS extensions to be produced by a "secure" compiler. This won't allow obviously malitious code to get into the kernal. A similar approach could be applied here.

    I'm sure they'll have thought this thru though!!! :-)

    -- Michael

  • Java Screamer???

    What for? Java is still a flashy thing, but it's stalling thanks to Sun. Also, Linus doesn't really respect Java, he believes much more in the i386 code as an "universal byte code". Adding to this that Transmeta wanted to come out with their secret chip at least one time, but they were delayed, and that Linus reportedly changed what do they should think of that chip, furthermore that Transmeta workers are allowed to say one thing: "it's a cool thing, I think you will want one too".

    So it's probably started as a mobile i386 clone, just like IDT's, or Winchip's CPU with a few extra twist, but Linus' mindset made them look much further. What would that be? For example, "don't add anything to the fast path". So, make a simplified ix86 chip, make it able to be optimized at several levels; maybe in several levels of micro/nano/millicode. Hardware is much harder to change, so let the software adapt to the needs by emulating very timing-critical parts of the application closer to the hardware; and the not-critical areas might be handled something like PAL code in the alphas, and do/emulate even more unneeded things via plain software exceptions.

    What you'll get? A chip+software synthesis (remember, "Transmeta"?) which is able to provide ultra-quick floating point to compute quake frames, when needed. Or heavy bit-shuffling operations for near-hw DES/other encryptions. Or just the timing critical parts of a Java VM.

    Nothing will run "native", but everything can run unbelievably effective. You say, MMX? Easy. m68k emulation? Easy. Not native, but damned quick. A few critical 3DNow! operations to speed up Quake3? Easy. An emulator's wet dream. Do you see why you'll want one too? It can run all your programs faster. Not just quake, but a PPC, a m68k, a Java application, and maybe close to all CPU's software at the same time. Add a bit higher level emulation, the VMWare Next Generation, effectively, and run really everything. On your wristwatch.

    Of course, I was exaggareting. With the wristwatch part :) And that's not my creature either. :)

    (Quotes are not literary, just from my foggy memory.)

  • From what I could read, I see one main market for this chip: embedded devices.

    Small chip, low consumption, own memory type and socket...

    Another possibility of course would be laptops! The main advantage of this solution is that an expensive chip is not a problem and that they could produce laptops that you could be used unplugged for more than 4 hours.
  • Well, perhaps unprivileged code won't be able to change the processor's microcode (unprivileged as in resembling Ring 3 in 80[3456]86 processors). That way, one wouldn't have to worry about the processor e-mailing core dumps to Intel/Microsoft/your favourite evil company/etc.

    About having the kernel in ROM, Tandy already did that. Many Tandy 1000's had MessDOS and DeskMate in a ROM that emulated a filesystem (it appeared as drive D:). Those machines booted fscking fast, but upgrading the OS was a chore. And think about it: burning a new kernel into flash would require special tools that regular users would screw their computers with.

    ^D
  • Do I want to cross-devel code for the processor embedded in my toaster? Fine, no need to purchase an emulator or special target environment, just load the code and go. Easy to run, easy to debug, really easy to build in-circuit debug features. Let my proc run i960 code in "protected emulation mode" while my "real" os and tools run native.

    Want to crack DES? Code it to the hardware.
    There are many possibilities.

  • Who gives a shit if it "wins"? All I want is to run Linux and open-source software on it. If the company goes belly-up, I'll still be happily compiling the latest code from CVS. World domination is an O.K. goal, but Quinn's desktop domination is all I ask. ;)
    Beer recipe: free! #Source
    Cold pints: $2 #Product
  • Hopefully you'd be able to do this only through a special BIOS mode. That way, you'd have to reboot from the console to do the Flashdance on your CPU. ;)
    Beer recipe: free! #Source
    Cold pints: $2 #Product

  • TransMeta (Score:3)

    by substrate ( 2628 ) on Thursday April 15, 1999 @08:33AM (#1932956)
    Some of the information is alarming if its true, though I doubt its veracity. Custom sockets and RAM could easily kill this CPU. The development of a socket is a very non-trivial task and custom RAM requirments can be very pricey. As for this not being a cheap CPU there is almost no way that it could be. Intel may be a few times larger, but there volume will more than make up for it.

    Upgradable microcode sounds more useful than it probably is. Sure, you can add new instructions to keep up with the competition but only for a short while. Eventually some architectural feature will stand in the way and while the microcode may due the feature it won't do it efficiently.

    Intel has the bucks to do arbitrary architecture changes just to keep the competition on its toes.
  • A lot of things work this way...one can even argue that NT HAL code is similar, but the AS/400 SLIC code must be changed per architecture. On the move to PowerPC, the SLIC code needed to operate the PPC was re-written.

    Transmeta is talking about this at a chip level.

  • Once upon a time... ?

    A lot of processors and architectures still have microcode, plus, you do not inherently have to put microcode in the processor itself, there can be another hardware layer implementing microcode.

  • My prediction (Score:3)

    by EngrBohn ( 5364 ) on Thursday April 15, 1999 @08:56AM (#1932959)
    Transmeta's processor will be a Java screamer. If it is designed at the silicon-level to translate other instruction sets into its native code, then besides x86, PPC, 68k, & Alpha instructions [1], there's no reason why it should not be able to make the translation for (most of) the Java instruction set.
    [1] I don't
    know that any or all of those will be implemented -- those are just examples.

    Christopher A. Bohn
  • I think you hit it on the head.

    The variable costs of production (manufacturing the chip, which could be cheap) does not equal the total costs of production. Some fixed costs come into play (R&D, for instance).

    It might be cheap to *make*, but they still have to recoup those R&D costs. Of course, if Transmeta turns out several 10s of millions of these, then their fixed costs become negligible.
  • You know, a Java chip would have to be able to handle new instructions as new instructions are added to the JVM spec. Other than this, I don't see that the life cycle of general purpose CPUs would be long enough to warrent upgrading the ability of upgrading the instruction set.
    Making the chip be able to emulate other chips would be nice. However, I think you'd run into so many other problems relating to software support of hardware subsystems (are a Mac, PC, & alpha all going to be able to use the *exact* same video card?).

    I dunno. I think that this thing would primarily be useful in laptops (low power consumption) and embedded Java chips. The way Java is being utilized on servers & n-tier systems, I can see where they'd be able to get away with charging big $$$ fo this chip, at least until there is viable competition.
  • Or maybe french canadian, eh?

    Damn canadian.... uh... philes.
  • Whle it wasn't in ROM, Tandy had a model with
    DOS (ver 3.x?) burned into ROM. Booted fast,
    upgraded poorly ;-)
  • Gee....Considering Linus himself is on the team developing this chip, I would venture a guess to say that Linux would be ported NATIVELY to this thing. Although it would run under it's built-in x86 emulation, It would run (obviously) faster natively. I know Linus chose a job that was Linux neutral, but this has nothing to do with his JOB, it's just a new platform for Linux to be ported to.

    This sounds like a gripe, but it's a valid one: If it's cheap to make, why not pass on the savings to the Consumer? Sounds like Transmeta is a bit greedy, but hey, I guess it pays for future research.

    -- Give him Head? Be a Beacon?

  • Just remember this when Transmeta actually comes to market.

    Intel does not produce the fastest, smallest, lowest-power-consumption or coolest (thermally) chip on the market.

    Outperforming Intel is not going to work - others are already doing that with only middling results. To beat Intel, you have to match their performance for less than half of their price. AMD matches the performance but doesn't offer enough cost savings to deliver the TKO punch.

    Users want very fast and very cheap. Unless Transmeta addresses this, their impact will be negligable.
  • Do the staff at Transmeta wear flared jeans and platform shoes?

    No, it's worse. They wear shorts, long white socks and Birkenstocks ;-)

    Microcode isn't coming back into fashion, btw. What's happening here is (probably) a hybrid between just-in-time compilation in the cache hardware (physically separate from the main execution path) and software emulation.

    But this is just one interpretation of the rumour.

    Jonathan
  • if they cannot be at least as fast as intel, at the same price, I cannot see big numbers of people moving in there direction...

    Why?

    First, there is the cost of proprietary hardware, which people are willing to swallow if there is a DISTINCT and LARGE advantage... What is the advantage here? Low power (you can buy a cheap Powerbook, they run in the less than 10 watts range), and emulating a few instruction sets. Now, that is not an easy thing to do from our point of view, but for Joe Public: who cares?

    It is fairly clear that x86 is going to dominate for at least several more years (in the celeron and K7 forms, etc), and so that is what people and business will continue to buy for their desktops. Of course, there will be the imacs, the SGI boxes (no longer MIPS anyway), and all the niche chips...

    So they can buy a proprietary, more expensive (or just as expensive), and slower chip from transmeta, or go with Intel brand stuff... Now as (non)reliable as intel or AMD might be, it's what people have now, and it works... i cannot think of a reason to go slower, and more expensive when you will be running the same software?


    now, as for the emulation, its a good idea, and most of the folks buying high-end equipment don't care much about price, but the one thing they do care about must be there: performance.
    where is the market for people who want to run 2 or 3 archetectures SLOWER than what is on the market? it isnt there!

    However, if this chip can run its own instuction set, with some OS, faster than what is currently out there, people will buy it because its faster. Simply that.

    that OS? if the master himelf does the porting, and this really flies by intel/sparc/PA-RISC, then it has a chance, a big chance, but IMHO, more niche than anything else...

    so ends the rant...

    noy [another random lurker]
  • It's really neat to see a chip based on the concepts of emulation at the lowest possible level. The fact that it's software upgradable will allow you to run it in either x86 or 68k or whatever mode you'd like. :)

    I'm assuming that a version of linux will be compiled to run on this chip. Would it be possible for it to run executables compiled for a number of platforms natively? This would be really cool in any case.

    It looks like it can emulate the PIII too. I wonder if it'll have the serial number... Heh
  • The AS/400 uses a special machine language that's independent of the hardware machine language; OS/400 quickly and efficiently translates the pcode to machine code. Thus, the transition from proprietary chips to PowerPC chips in the new AS/400s was painless for customers: they didn't even know anything had changed except that their AS/400s were now faster.
  • One has to remember though that cost is a final determining factor for many of us anyways. How much is expensive for these little guys anyways? PSN's in the Pentium 3's aside, how many of you actually own a p3? There's a cost issue there, primarily because of intel's celerons (intel raised prices on its p2's when the p3's came out) My point is, at $1000(?) bucks a piece, is it worth it?- Especially when a good celeron that runs sweet in linux can be had for $70. I'm sure production numbers will greatly affect these guys when they come out...
  • You can certainly add new _instructions_ by changing the microcode. The way microcode works is that each opcode is actually a jump instruction to a certain point in control memory. The section of memory that correspond to opcodes is actually a sort of jump table to where the actual work gets done.

    So yes, you can add instructions if you define previously "reserved" opcodes and add the control sequence for them. Whether you can actually do something really new with them depends on if you're not using all the features of your ALU or coprocessor, which is not a likely situation.

    Therefore, adding mere instructions is not a problem with microcode (unless you've used all the opcodes from 0 to 2^the length of your opcode). Adding new actual features is much harder.
  • So when does rumor have Transmeta going public? I wouldn't mind having a piece of that stock ;)
  • >What would be cool would be to have a complete OS kernel in flash ROM

    Huh? Been done. Not on the die yet, but on a separate chip just like a regular BIOS, only like 8mb or so instead of however-big-a-usual-bios-is these days.... saw it on a NAS disk yesterday at AIIM. Turn on the NAS disk, it cries to Mama for DHCP, if it doesn't find it, it takes 10.10.10.10, then either way point a web browser at it, configure SMB, NCP, AFS, NFS, you name it, it's got it. No, I don't remember the name of the company, but they weren't the only ones doing it. This just happened to be Linux.... and this is not the first thing I've seen with linux-on-a-chip (the first being the automated CD jukebox), nor the last... watch this space....
  • I think it is a combination of price factors. AMD is doing very well considering that they are going against one of the best companies around...

    PowerPC and Alpha have trouble because of the full package cost. bang for buck, the PowerPC is about the best processor around for desktop computers but the cost of building an actual PowerPC computer are much higher than for building a pentium machine. There are plenty of cheap chipsets, motherboard, and motherboard components for pentiums. IBM and Motorola make a few PowerPC motherboard products and they cost 10x(!) more that the pentium version because of all the custom work.

    What really needs to happen is we need to comoditize the rest of the hardware on a motherboard. Intel has a huge advanatage at this becuase the support hardware for an intel chip is quite a bit different than for most other chips. If you want to plug a PowerPC or Alpha into an intel style board you have to build some custom chips to add that extra logic, custom chips == more cost. I think that as Merced comes out and more and more people consider leaving the ia-32 x86 behind it will become more competitive, I just hope the PowerPC and alpha last that long, neither of them is in the hands of a company that doesn't also benefit from intel.

  • I think that it is a bad idea if the software to upgrade it did so with a few CPU instructions, instead they should have a boot disk that people can download that would upgrade it, (eg. the boot disk looks at the compiled kernel and since it is "official" it'll update itself. I think that it would be a good idea because the upgrade prices would drop (if they existed due to the fact that software would upgrade it) and like I have seen In other posts, once you get to a certian point in speed and hardware, just make a new chip. It would be like Intel adding the MMX to a chip but they could do that with a software upgrade, and then like Intel realeasing P3's that could be a new, faster chip. I also think that the native emulaters would be cool especially if you could run all different types of programs under one platform (eg. a mac program, x86, etc).
  • Sounds like the chip is an FPGA.
    That means the chip will be slower but its not just "software upgradeable" but could actually change itself on the fly to match the needs of the moment. If it comes to a heavy bit of number crunching then it can increase the FPU.
    FPGAs have their ups and downs, its all in the implimentation.
  • is is possible to have a version of an os, say linux, running on transmeta silicon that can DYNAMICALLY load libraries and run Java, i386, etc. etc. etc. at near-native speed without rebooting? if so that would be kewllllll
  • Am I the only person who thinks that this is a Bad Idea? It brings the amount of damage that virii can do to a whole new level. I mean, you can just flash a CPU to give a new instruction that says, like, "e-mail a complete memory dump to so-and-so..."

    What would be cool would be to have a complete OS kernel in flash ROM, or actually on the CPU die itself.

  • AMD had a price advantage till intel got smart & put actual cache in their celery (celeron). The celery though can just keep loosing money though & intel will hardly ever care as long as they crush AMD.
  • Transmeta is probably the biggest rumour mill in the computing community today. Maybe they should collect rumours on their website, together with the Linus picture of the week, put some banners ads up there, and a link to [your associate's program here]. Then they can stop working on what they're working on now altogether and their IPO will still be one of the hugest ever.

    Perhaps that was their plan all along and they're laughing their asses off every day.

  • Hey, I seem to recall that there was *something* different in how the P6 did the microcode, or at least the later versions of the Pentium II. Like, perhaps, there was some very small extended functionality, or something of that type. I could very well be totally fantisizing this, so I wanted to ask you to make sure.

    -JC
    PC News'n'Links
    http://www.chiptech.com/jc
    (ouch, my server!)

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