Intel Demos Its New 'Backside' Power-Delivery Chip Tech (ieee.org) 28
Next year Intel introduces a new transistor — RibbonFET — and a new way of powering it called "PowerVia."
This so-called "backside power" approach "aims to separate power and I/O wiring, shifting power lines to the back of the wafer," reports Tom's Hardware, which "eliminates any possible interference between the data and power wires and increases logic transistor density." IEEE Spectrum explains this approach "leaves more room for the data interconnects above the silicon," while "the power interconnects can be made larger and therefore less resistive."
And Intel has already done some successful powering tests using it on Intel's current transistors: The resulting cores saw more than a 6 percent frequency boost as well as more compact designs and 30 percent less power loss. Just as important, the tests proved that including backside power doesn't make the chips more costly, less reliable, or more difficult to test for defects. Intel is presenting the details of these tests in Tokyo next week at the IEEE Symposium on VLSI Technology and Circuits...
[C]ores can be made more compact, decreasing the length of interconnects between logic cells, which speeds things up. When the standard logic cells that make up the processor core are laid out on the chip, interconnect congestion keeps them from packing together perfectly, leaving loads of blank space between the cells. With less congestion among the data interconnects, the cells fit together more tightly, with some portions up to 95 percent filled... What's more, the lack of congestion allowed some of the smallest interconnects to spread out a bit, reducing parasitic capacitance that hinders performance...
With the process for PowerVia worked out, the only change Intel will have to make in order to complete its move from Intel 4 to the next node, called 20A, is to the transistor... Success would put Intel ahead of TSMC and Samsung, in offering both nanosheet transistors and backside power.
This so-called "backside power" approach "aims to separate power and I/O wiring, shifting power lines to the back of the wafer," reports Tom's Hardware, which "eliminates any possible interference between the data and power wires and increases logic transistor density." IEEE Spectrum explains this approach "leaves more room for the data interconnects above the silicon," while "the power interconnects can be made larger and therefore less resistive."
And Intel has already done some successful powering tests using it on Intel's current transistors: The resulting cores saw more than a 6 percent frequency boost as well as more compact designs and 30 percent less power loss. Just as important, the tests proved that including backside power doesn't make the chips more costly, less reliable, or more difficult to test for defects. Intel is presenting the details of these tests in Tokyo next week at the IEEE Symposium on VLSI Technology and Circuits...
[C]ores can be made more compact, decreasing the length of interconnects between logic cells, which speeds things up. When the standard logic cells that make up the processor core are laid out on the chip, interconnect congestion keeps them from packing together perfectly, leaving loads of blank space between the cells. With less congestion among the data interconnects, the cells fit together more tightly, with some portions up to 95 percent filled... What's more, the lack of congestion allowed some of the smallest interconnects to spread out a bit, reducing parasitic capacitance that hinders performance...
With the process for PowerVia worked out, the only change Intel will have to make in order to complete its move from Intel 4 to the next node, called 20A, is to the transistor... Success would put Intel ahead of TSMC and Samsung, in offering both nanosheet transistors and backside power.
Backside power delivery? (Score:1, Funny)
So, intel is plugging it in the back now?
Yes, inmature, I know. But funny as hell. The joke begged to be made
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Preparations A through G have been largely unsuccessful so we’re calling this one preparation H.
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Yes, inmature, I know.
No, that's not the problem. The problem is that your comment lacked a link.
Here it is: Back side plugs [electrastim.com]
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So, intel is plugging it in the back now?
Yes, inmature, I know. But funny as hell. The joke begged to be made
Only a Brazillian would think like that since I hear their women like it in the back.
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So, intel is plugging it in the back now?
Yes, inmature, I know. But funny as hell. The joke begged to be made
Only a Brazillian would think like that since I hear their women like it in the back.
I am not brazilian, nonetheless, I am in the same continent. Everyione is just jealous because I got FIRST POST BABY!
Competition (Score:3)
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Time to spur some creativity and lower prices!
HAHA! Do you even know Intel? They always aim for higher prices.
Backside Power Delivery? (Score:1)
A new level of dumb at Slashdot (Score:5, Insightful)
A ratio of 11 to 1 of wild ass UFO theories over hard core computer technology shows how Slashdot has devolved. Ever if people were engaged in flame wars of the AMD vs Intel variety, Slashdot was the home of hardcore nerd involvement. Now it's about dumb-ass jokes in the literal sense, because the headline used the word "backdoor".
You are the pathetic dregs of Slashdot. I checked here to see about IC architecture and all I got was lame jokes.
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I sometimes post intelligent comments
Na, you don't.
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Not gonna disagree, but I don't think I have an enormous amount to add. All the big 3 are working on backside power delivery and gate all around FETs. Cool to see it demoed, and I'm sure the tech will make it into chips soonish.
But, the dramatic gains are over so it's hard to get quite so excited anymore:
From 1987, in 10 years I went from a BBC Master (6502, 128KiB RAM, 5.25" floppy), to a P133 with 72M of RAM. Within a few more years, it had a CD-RW and a TFT monitor. From 2010, in 13 years I went from a C
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The issue on Slashdot is that this isn't exciting. I'm a hardcore nerd, an electrical engineer even who dabbled in chip making at university and have higher understanding of the subject than most here.
Yet I'm not interesting in discussing this. It's boring. It's a minor evolutionary change in the way we produce chips. It's about as exciting as an announcement that things a getting a bit smaller.
I am far more interested in the UFOs story. I'm not here to absorb tech news for tech news's sake. I'm still inter
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We can get much more interesting tech from crashed UFOs.
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My only comment, as someone who does this kind of stuff for a living, is that Intel is not really making massive innovations here. This is standard 3D chip design, where these days they aren't really chips on a substrate any more, they are collections of chips.
Presumably AMD has been doing this kind of layout optimization for years and just didn't think to brag about it, because their CPUs are already a lot more efficient than Intel's. Intel's current generation parts are ridiculous, in terms of power consu
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Well a bunch of stuff [semiengineering.com] to try but the main is changing the tools to accommodate. [appliedmaterials.com]
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great (Score:1)
Good thing this wasn't developed in Britain. (Score:2)
Instead of "backside power", Britons might have called it "arse power".
Convenient. (Score:2)
Also, it conveniently gives an excuse for yet-another-socket form factor, requiring everyone to buy new motherboards (read: chipsets) in order to use these new processors.
Funny, that.