Samsung Starts 3-Nanometer Chip Production Ahead of TSMC (techcrunch.com) 27
Samsung Electronics said Thursday it has kicked off mass production of 3-nanometer chips, becoming the first company to do so globally, as it aims to beat Taiwan Semiconductor Manufacturing Co, or TSMC, the world's most advanced foundry chipmaker. TechCrunch reports: Samsung said it's using gate-all-around (GAA) transistor architecture, which allows these first-generation 3-nm chips to have 16% smaller surface area, 45% reduction in power usage and 23% performance improvement compared with current 5-nm chips. The South Korean company also said in a statement that the second generation of the 3-nm process would allow 50% lower power consumption. The company is currently producing the first generation of 3-nm chips and plans to start the second generation of the 3-nm process production in 2023, a spokesperson at Samsung Electronics told TechCrunch.
Samsung has been competing with Apple chipmaking partner TSMC, which also said in June that it would begin mass production of a 3-nm chip process to volume production in the second half of 2022. The Taiwanese company plans production of 2-nm chips by 2025. (The smaller number of nanometers, which are hard to develop, the more advanced chips, according to industry sources.) The spokesperson explained that smaller nodes allow more transistors to be placed on a given area, which enables the chip to be more advanced and more power-efficient. [...] The South Korean tech giant will produce the advanced 3-nm chips at its Hwaseong semiconductor production lines and its third chip plant in Pyeongtaek, the world's largest semiconductor facility.
Samsung has been competing with Apple chipmaking partner TSMC, which also said in June that it would begin mass production of a 3-nm chip process to volume production in the second half of 2022. The Taiwanese company plans production of 2-nm chips by 2025. (The smaller number of nanometers, which are hard to develop, the more advanced chips, according to industry sources.) The spokesperson explained that smaller nodes allow more transistors to be placed on a given area, which enables the chip to be more advanced and more power-efficient. [...] The South Korean tech giant will produce the advanced 3-nm chips at its Hwaseong semiconductor production lines and its third chip plant in Pyeongtaek, the world's largest semiconductor facility.
Remember: nowadays nm numbers mean j4ck517 (Score:5, Informative)
It used to be that the nm number measured Gate lenght.
then nm numbers measured the smallest cable (and cable separation) you could etch in the first metalization layer (M1) to address your transistors.
But nowadays the number is marketing derived, with smaller==better.
There have been attempts at keeping using the M1 pitch, not very sucessfull (the M1 pitch is not shrinking as fast as the marketing folks want).
There have been attempts to use (logic) transistor density as the new number (no one agrees on the way to measure it).
So, we are left with silly numbers that not mean much.
Meanwhile, the real advances, like Cobalt interconects, Germanium Gates, ASML PanScan etching machines get under-rug-swept.
M'enfin
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Thank you. I wanted to come here to say this, but you obviously know a lot more about this area than I do, and laid it out just right. It's a marketing number with only a tenuous relation to performance. Much like CPU Ghz.
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Yes, process node numbers are fake, but CPU frequency numbers aren't.
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But CPU frequency is no longer directly related to performance. Just like Xnm in the fabs.
Like in the parent post, you have to look into cache, number of cores, tdp, etc before you can gauge if a particular CPU is what you really need.
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Ok whatever man. But, they also provided performance improvement numbers. I mean, the power savings, that means something. A lighter phone or greater time between charges, more realistic VR, and of course the science and engineering applications such as robotics, medicine design, and full self-driving cars that come from being able to do more computation for the same wattage.
Re: Remember: nowadays nm numbers mean j4ck517 (Score:2)
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Re:Remember: nowadays nm numbers mean j4ck517 (Score:4, Interesting)
The people who are complaining about it not really being true node size are those who have been claiming that Moore's law is dead, got proved wrong, and want to claim that it really is dead but the performance increase is not due to node size
Which demonstrates that it is you who doesn't understand what Moore's law was. I will spell it out: Moore's law was all about transistors getting cheaper because you could fit more of them on a wafer. Cheaper means you can use more of them for the same cost. Higher performance is a nice side effect but that isn't Moore's law. Getting smaller, faster, but more expensive transistors doesn't do anything to resurrect Moore's law.
Have you noticed that number of foundries making leading-edge process chips has declined to just a handful? Development costs certainly contribute. But you may not realize is that rather few chips are built on leading-edge processes. Even in high volume, the numbers don't pencil out unless you really need the performance. This didn't happen when Moore's law was real. EVERYBODY was using leading-edge or nearly leading-edge processes. They might wait a year or so for the bugs to sort out but they absolutely were going to take advantage of the cheapest transistors available.
Re: Remember: nowadays nm numbers mean j4ck517 (Score:5, Insightful)
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It was an observation that they were roughly doubling the density every two years.
You're reading into it and attempting to claim it means more than that.
And we have not kept up with that for a long time [twitter.com]. If that prediction held true, we would have 15x more transistors in our chips.
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Chips haven't gotten 20-50X more expensive (Score:2)
> Higher performance is a nice side effect but that isn't Moore's law.
Right. Moore's law states that the transistor density will double, for the node size that has the lowest cost per transistor.
> Getting smaller, faster, but more expensive transistors doesn't do anything to resurrect Moore's law.
Today's CPUs have 20-50X times as many transistors as 10 years ago. (114 billion for the M1). Are the 50 times more expensive than CPUs ten years ago? No. They are cheaper, not "more expensive".
Transistors ha
Re: Remember: nowadays nm numbers mean j4ck517 (Score:2)
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Just reminding people that nobody uses "nm" in their marketing anymore. The node is 3GAE. TSMC's "3nm" node is actually N3. If you want density figures on 3GAE you can look it up. I found ~202 MTr/mm2 for Samsung 3GAE while TSMC N5 claims ~187 MTr/mm2. Note that those figures generally apply only to test SRAM cells, not real-world logic implementations.
The real accomplishment here is that it's the first commercially-available GAAFet node. Assuming it reaches actual commercial availability. There was
Lots of innovation left to do (Score:3)
When it comes to electronics, we have a huge amount of innovation left to do. For one thing, power consumption .. it sucks royally. The brain uses only around 30 watts and it can do a hell of a lot of computation (in most people, anyway). We have 85 million neurons. Let's say 100 million for math-ease sake. How many neuron equivalents does a modern CPU have? And what's its energy consumption per neuron? I bet it can't beat the brain's ten-millionth of a watt per neuron. We need a whole new way of looking at how we make our computing devices.
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When it comes to electronics, we have a huge amount of innovation left to do. For one thing, power consumption .. it sucks royally. The brain uses only around 30 watts and it can do a hell of a lot of computation (in most people, anyway).
The brain can do a hell of a lot of fuzzy computation, probably based mostly on making analog comparisons. But it doesn't do very much digital computation at all, even in very highly trained persons. The computer can do a whole lot of digital computation, but it can do absolutely no analog computation, it can only fake that with approximations. The two simply aren't directly comparable, except for specific tasks.
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But... (Score:2, Interesting)
Samsung's 3nm is more equivalent to TSMC 4nm, and TSMC's 3nm is much better than Samsung's 3nm. TSMC 3nm process starts somewhere in the later half of this year.
Yes, this is for the geeks. (Score:3)
(The smaller number of nanometers, which are hard to develop, the more advanced chips, according to industry sources.)
Gosh! smaller number of nanometers just means smaller/thinner. Would you say ...smaller the number of miles [between cities] ... nearer/closer [they] are? Then why this contrived sentence?
Re: Yes, this is for the geeks. (Score:2)
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"Then why this contrived sentence?"
If cities A and B are 5 miles apart and cities A and C are 3 miles apart, you can say the distance between A and C is 60% of the distance between A and B.
If you say one process is 5nm and one process 3nm, you really can't say any particular thing is 60% of something else. Some measurements actually get bigger. You hope that the area for a fixed function get smaller, but you may be unlucky.
Size for size sake, money for god's sake (Score:2)
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The original reason for reducing gate size was to reduce gate capacitance. This had a 2-fold effect: less energy was used, and charge/discharge took less time, therefore a transition was faster. The net result being a faster chip that consumed less power. This is not true of the stacked technology that's being touted now. The only advantage seems to be size for size sake.
In the analog world, size matters. Being able to stack the buffer for an image sensor behind the actual sensor bits, with per-pixel amplifiers behind that would result in real-world improvement in signal integrity.
And even in the digital world, reducing the size of a chip has benefits in terms of being able to pack more storage and RAM into small devices, leaving room for a bigger battery, etc.
So don't underestimate the benefits of size reduction even if it doesn't reduce power consumption.
That said, the 3
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ASML NXE:3600D (Score:2)
Serious question.
Since they are really both using the ASML tooling, isn't this like an airline clapping themselves on the back for having the longest nonstop flight? What sort of value add are companies like TSMC, Samsung and Intel making, and in what areas?