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Hardware

Taiwan's TSMC Claims Breakthrough On 1nm Chips (taiwannews.com.tw) 70

Posted by BeauHD from the new-and-improved dept.
Hmmmmmm shares a report from Taiwan News: Taiwan Semiconductor Manufacturing Co. (TSMC), National Taiwan University (NTU), and the Massachusetts Institute of Technology (MIT) have made a significant breakthrough in the development of 1-nanometer chips, reports said Tuesday (May 18). The joint announcement has trumped IBM's statement earlier in the month about the development of a 2nm semiconductor, British website Verdict reported. While at present the most advanced chips are 5nm, TSMC's find was likely to lead to power-saving and higher speeds for future electric vehicles, artificial intelligence, and other new technologies.

The discovery was first made by the MIT team, with elements optimized by TSMC and improved by NTU's Department of Electrical Engineering and Optometrics, according to a report in Nature Magazine. The key element of the research outcome was that using the semi-metal bismuth as the contract electrode of a two-dimensional material to replace silicon can cut resistance and increase the current, Verdict reported. Energy efficiency would thus increase to the highest possible level for semiconductors.
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Taiwan's TSMC Claims Breakthrough On 1nm Chips More

Taiwan's TSMC Claims Breakthrough On 1nm Chips

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  • ... it's vaporware.

    • ... it's vaporware.

      No, but it probably is five years out.

      • Re: (Score:2)

        by robi5 ( 1261542 )

        5 years would be amazing, it's a 0.7x multiplier on the feature length every year for 5 years. Would be unprecedented

    • Re: (Score:2)

      by BobC ( 101861 )

      This. The progress refers to 2D semiconductors, very unlike today's 3D silicon semiconductors. This Bismuth contact technology is an important piece of the larger picture, but is certainly not the whole picture when it comes to making progress in 2D semiconductors. It will inevitably stimulate further 2D semiconductor interest and research, but we ain't there yet!

      • Re: (Score:2)

        by Guspaz ( 556486 )

        The same could be said of IBM's 2nm announcement, which was years away as well.

        TSMC is currently planning to hit mass production with 3nm around the end of this year, 1nm is not that many nodes away.

  • Five Atoms (Score:5, Interesting)

    by crow ( 16139 ) on Thursday May 20, 2021 @05:27PM (#61405178) Homepage Journal

    One nanometer is about five silicon atoms, so we must be getting close to the physical limits of this technology. Of course, marketing can fix that and redefine how we measure so that we can report smaller numbers than what scientists would use. I'm under the impression there's a good bit of that already, with differing ways of reporting the sizes.

    • If want features that are consistent on the atomic scale - surely an eventual necessity - we either have to settle for small quantities of chips assembled atom by atom or figure out how to grow them like crystals.

    • Re:Five Atoms (Score:4, Informative)

      by flatulus ( 260854 ) on Thursday May 20, 2021 @05:41PM (#61405234)
      I don't think your interpretation of 1nm is meaningful here. Saying that a chip is a 1nm chip these days does not mean its minimum feature size is 1nm. Instead, it means that the transistors are built vertically so that in areal density, the effect is as if the transistor was 1nm minimum in 2D. Kinda like how SSD flash has gone 3D to get higher densities.
      • So, is it like saying, the office workers in the Chrysler tower in Manhattan are sitting on 1/3 inch wide chairs. Because if you try to fit all the chairs in that building into its footprint they will be just 1/3 inch wide.

        Got it. Thanks.

        • Re:Five Atoms (Score:4, Informative)

          by Guspaz ( 556486 ) on Thursday May 20, 2021 @07:53PM (#61405542)

          Well, it'd be nice if it was the case. In practice, it doesn't actually have any relation to physical dimensions anymore, not even the stacked analogy given. Node names are now purely marketing terms with no connection reality, which is why you hear things like Intel's 10nm process having a similar density to TSMC's 7nm process, or IBM's 2nm process being similar to TSMC's 3nm.

    • For quite some time the nanometers haven't had much to do with physical dimensions anymore. Measuring the gate width was a thing with planar technology when it was still entirely planar, after FinFETs became common it started losing meaning. I think right now the nanometers mean power efficiency equivalents to when they still meant physical dimensions. And that's the thing that actually matters - power efficiency per computation. Because you are up against wall with cooling, you can't put double the heat in

    • Re: (Score:2)

      by DrTJ ( 4014489 )

      Crystalline silicon has a lattice constant (="distance between atoms") of 5.43Å, or 0.543 nm.
      So, if "1nm process" would indicate some kind of physical size on the die, it could not stretch of more than 1/0.543 =1.84 atoms.

      From a quantum perspective, such a small distance would pose no significant barrier for electrons. They would easily tunnel through that, so "1 nm" is meaningless as a physical description.

      As stated elsewhere in the comments here, the transistor density is a much more reliable metric.

    • Re: (Score:2)

      by otuz ( 85014 )

      Perhaps we're just going into sub-atom size computer features. Quantum computers the other way.

    • 5 atoms shoulder to shoulder, but atoms are like ping pong balls so they form a lattice when placed in a volume and have a packing factor, it's more like 9-10 atoms wide.

  • Intel is hitting back with a 0nm chip

  • Stop with the nm and tell us transistor count (Score:4, Informative)

    by spun ( 1352 ) <loverevolutionary&yahoo,com> on Thursday May 20, 2021 @05:29PM (#61405194) Journal

    Isn't feature size pretty much irrelevant now with modern 3d process nodes? What, exactly, is "1 nanometer" even purporting to measure? From what I understand, when someone says "10 nm" or "5 nm" these days, it doesn't even have any specific meaning, it's just a sort of generation marker. I believe measures of transistor density are much more meaningful.

    • Re: (Score:2)

      by ffkom ( 3519199 )
      Once they figured out how to make a "two-dimensional material", they essentially left the sphere of conventional physics because now, they can stack up an infinite number of layers of that material without making the chip any thicker!

      But yes, back in the realm of reality, your request for providing actual transistor density values is a reasonable one.

    • I think it's insane, absolutely ludicrous, that they can even fabricate even 1 billion transistors and have them ALL work. Think about how crazy that is.

      • They often can't actually do that with existing feature sizes. That's why there's processors with cores disabled, for example.

        • Of course they have yields and some of the chips don't work on the wafer, but it's amazing they can make even one chip with billions of transistors that all work, it's mind blowing

  • What better times could you ask for than the current time to make big, bold claims regarding new exciting chip technology! After all, you don't really have to deliver anything in the next years, you can always blame the "chip shortage" eating up all the capacity you would have needed to turn your exciting new technology into actual products on the shelves. So I expect more, and even bolder claims in the weeks and months ahead.

  • Forget nanometres, I want to see ångströms. Å FTW!

  • Right now, TSMC's 1nm node is in path-finding mode and the foundry is experimenting with various options. TSMC's 1nm fabrication process will not be used for high volume manufacturing for years to come and it is not guaranteed that semi-metal bismuth will indeed be used at all. Nonetheless, it is evident that TSMC is already working on its 1nm technology.

    From https://www.tomshardware.com/n... [tomshardware.com]

  • Those Chinese (Score:1, Funny)

    by dwater ( 72834 )

    They're clever...

  • I wish my car could go 1nm.

    • I see no possible way that a 1nm integrated circuit relates to faster electric vehicles. To make an electric car faster is a function of power delivery to the motor. Any silicon between the batteries and the motor need to be super thick for high current delivery, and absolutely *NOT* 1nm.

      • Not faster electric vehicles, but faster a autonomous electric vehicle. Right now all the cameras and processors (GPU's) can take up to 2kW (like 2-3 conventional ovens) of electricity for processing. Every time you step down a node you can get faster or more efficient (like 50%-70%). So if you were to take today's GPU's and scale them down, you'd get something like 4x better efficiency.

      • Re: (Score:2)

        by MrL0G1C ( 867445 )

        Yeah, they forgot to mention self-driving and it's still dumb. I don't think self-driving vehicles drive slow because of lack of processing power but they drive slow so that when they crash they are far less likely to kill someone. It's not about the processing power it's about the software being able to handle all situations - it's not there yet. currently all it takes to confuse a Waymo car is a few traffic cones that any human can circumnavigate with ease.

  • Yes it probably trumped IBM's announcement, but the difference is that the 1nm tech will only be available a few years after IBM's 2nm tech. So in that regard it doesn't really trump it, it's just the successor for the future after the 2nm, and they will find a way to make it even smaller after that.

  • The US better bring all of Taiwan to the US before China takes them over. Coming to a theater near you soon. Theater of war, i.e.

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