EUV Chipmaking Inches Forward 32
szotz writes "You've got falling droplets of molten tin, bright lasers, and fancy evacuated optics. What's not to love about EUV light sources? The fact that we still don't have them in production lines producing chips. Light source maker ASML says it's 'more confident' that the technology's on track now, and that the machines should meet their target brightness by 2015, in time to help pattern the 10nm generation of chips — the next next generation. We'll see. Or then again maybe we won't. The light's outside the visible range."
Outside the visible range?!? (Score:2)
Given than EUV is absorbed by pretty much all normal matter, why would it have trouble lighting up our light sensing cells, while at the same time microwaving our brains into mush? I'm pretty sure I could sense that.
Re:Outside the visible range?!? (Score:4, Interesting)
Given than EUV is absorbed by pretty much all normal matter, why would it have trouble lighting up our light sensing cells, while at the same time microwaving our brains into mush? I'm pretty sure I could sense that.
Unless re-emitted as visible light, something that high in the UV range would just be absorbed by the cornea, lens, or aqueous or vitreous humors before having a chance to hit the retina.
The potentially-permanent damage would be noticeable; but probably not immediately(allegedly, the sensation is similar to having your eyes full of sand, without any sand you can remove, sometimes followed by cateracts. Zesty!)
If the UV is high energy enough, and there is something even slightly fluorescent in the eye, you might be able to see the visible light produced when the fluorescent material is energized by the UV. That would be a Bad Sign; but at least an immediate one (possibly not as bad as seeing Cherenkov radiation in your eye; but still bad).
Re: (Score:2, Informative)
You'll be find as long as you stay out of the machines in a chip fab.
Re:Outside the visible range?!? (Score:4, Funny)
You'll be find as long as you stay out of the machines in a chip fab.
Based on the likely cost of a spoiled 200-300mm wafer on a 10nm process, I suspect that the operator of the fab would kill you before the UV does...
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No, you go to the chip fab to get the chips drawn and fabs inside your eyes! Bionic Eyeballs!
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sense != sight (Score:3)
EUV source (Score:4, Informative)
I was at SPIE in San Jose in 2011 and they had a few of the demo EUV light sources on the convention floor. It looked like it was out of the Hellraiser films. I can only imagine how large (and evil looking) something capable of doing 125 300mm wafers per hour will be.
All joking aside, there are still huge obstacles to overcome for EUV. The line edge roughness issue may be a show stopper for nodes beyond 10nm as the chemistry of the diffusion lengths of the photo-activated compounds of the resist is close to this feature size and can add a significant variance to the CD of the lines. Also cost is going to be a major question, last I heard the "pre-production" tools are going for 130 million a piece and the reticle sets are going to be getting into millions of dollars (if not 10 Million). So if its cheaper to buy a bunch of E-beam tools and/or a bunch of 193nm immersion tools (for triple patterning) the EUV may never make economic sense for fabs.
Re:EUV source (Score:5, Informative)
"a bunch of 193nm immersion tools (for triple patterning) the EUV may never make economic sense for fabs."
A problem with dual/triple patterning is that it is mostly suitable for making parallel lines, not complex patterns. It happens that this works very well for NAND memory, but for CPUs, not so much.
Another problem is that you need 2x or 3x the number of process steps, which puts the higher price for EUV machines into perspective.
I expect that the primary target at the moment is to develop the technology. Once we're there, more attention can go to reducing costs.
Disclosure: I work at ASML on the EUV source. But this are my own views; I don't officially represent the company.
Re: (Score:1, Interesting)
Well, you can build CPUs with triple patterning based on the aforementioned parallel lines, but probably not ideal ones.
The trick is to use triple patterning to fabricate the gate substrates and contact wires, and use e-beam direct-writing to remove the connections you don't want. It's not an ideal process, as each cell has to be individually ablated, and you only get one parameter for each gate (gate-length), so things like tri-gate and FINFET are not going to be easily fabable.
One possible advantage is fo
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you guys are cute. several fab companies are already well into their evaluation processes to produce fully patterned 10nm wafers with evaluation CPUs and mixed signal ckts. and all without EUV (*gasp*).
in triple patterning, the third color is typically to produce the notches and orthogonal lines.
it's the double patterning that is mostly for parallel lines.
Re:EUV source (Score:4, Interesting)
One could imagine FEL based sources for EUV. At SLAC / LCLS we run reliably at even shorter wavelengths, 4nm is our long wavelength limit, 0.12 at the short end. Average power is low now, but there is a clear path to at least kilowatt average powers (see the LBNL NGLS) and 10s of KW are pretty straightforward.
The sources are very expensive - $100M-$1B, so they might be out of reach for even a large fab.
There has been quite a bit of work on EUV / Xray optics, but again the parts are really expensive (an X-ray mirror runs $1M. )
It probably ends up as an economic issue (not surprising), it it worth building sources like this.
Free electron lasers as EUV source (Score:2)
A clear path to kilowatt powers, that's sounds a bit like the stories about the EUV sources years ago. Reality turned out to be quite a bit harder...
Are those normal incidence or grazing incidence mirrors? For proper imaging, you need to
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I can't comment on other sources. FELs based on superconducting accelerators do scale well to fairly high average powers - though at a very high cost. Our machine runs at a few mJ/pulse but is limited to the 120Hz rate of the room temperature accelerator. Superconducting machines run well at MHz rates (some like CEBAF have been doing this for years). There are some longer wavelength FELs (IR and near UV) with high average powers, its just more money to push them to the EUV. (maybe too much money).
Most o
Progress (Score:5, Interesting)
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Not true, its more than that. The linear dimensions are 1000x smaller, so the area is 1000*1000 times smaller, thus the area difference is a factor of 1 million.
10nm is a measure of length, not area.. so his statement about 1000 is correct (the opposite of "not true")
Then, he performs the area calculation and specifically mentions that 1 million transistors fitting in the same area (you even quoted it.)
I wish you were worthless, instead of worth less than worthless.
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Wow.. parent literally pointed out that the conclusion is that a million transistors fits within the same area if the feature size is 1/1000 of the original size.
You aren't exactly the Dilbert Parrot Man [dilbert.com] but you are uncomfortably close.
re (Score:1)
Here's a more informative link (Score:5, Informative)
Actually explains the process in detail:
http://spectrum.ieee.org/semiconductors/design/plans-for-nextgen-chips-imperiled [ieee.org]
BTW, it's considered good practice in anything related to scientific research to define acronyms the first time they are used. In this case, EUV == extreme ultraviolet
ASML (Score:3)
And they're good at it so pretty much every chip maker buys their kit.
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Oh come on, that's a bit of an understatement. Most of the stuff they get "from different suppliers" has been designed by them and is manufactured according to strict prescriptions. It's not like they simply fill in some forms on web shops at "highspeedsiliconwaferstages.com", "uvlightsources-shop.com", and "allyourlenses.co.cn" and have some guy in a garage throw the stuff together in a box.
Re:ASML (Score:5, Interesting)
With the acquisition of Cymer, ASML is actually a light source maker.
It is true that ASML outsources the manufacturing of most components as far as it involves materials processing (machining, coating, soldering) and off-the-shelf components (pumps, filters, sensors, computers, bolts, cables, etc.). But the actual assembly and tuning of these thousands of components is done by ASML's own employees in ASML's own cleanrooms. As I am typing this, this is happening about 15 meters below my office.
Given the wide variety in technologies used in these scanners, and given how fast the technology changes, it wouldn't make much sense to do all the materials processing in-house. For me as a design engineer it is quite cool that I generally only need to worry whether the design of a component is manufacturable by some supplier in the world, rather than that I have to keep in mind what our own tools, which have to be used because they are not yet written off. That would slow down development tremendously -- it is already hard enough to keep up with Moore's law without such a restriction.
(The above are my own views/opinions yadda yadda)
Alternative EUV Technology: Zplasma Stable DPP (Score:1)