Non-Volatile DIMMs To Ship This Year 63
Lucas123 writes "Both Viking and Micron plan to ship cards that combine DRAM and NAND flash on a standard DDR3 DIMM. The cards will have twice as much NAND flash as volatile memory. For example, the non-volatile DIMMs will come in capacities ranging from 4GB of DRAM to 16GB and 8GB of flash to 32GB of flash. Micron also sees its NVDIMM card being used as a storage tier, as cache for RAID systems, system check pointing, full system persistence, data logging, de-duplication and fast access to metadata. Without providing specifics, Viking said the NVDIMM cards will cost roughly a few hundred dollars each, more than a standard DDR3 DIMM module but still inexpensive enough for server and storage admins to consider for boosting application performance."
I don't get it... (Score:1)
What's the main advantage of this over running a server using RAM as disk cache? I'd like to think that no one would use a server for real work without it being on a UPS, so what's the advantage over having a controlled shutdown when power is lost vs having non-volatile data in your ram stick?
Re:I don't get it... (Score:5, Insightful)
ummm... power consumption.....duh.
servers are not busy all the time....they idle but need to spin up fast on demand....
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I'm going to assume they have done the numbers and decided it makes sense, but to me it seems like only very specific and uncommon applications would benefit from trying to spool out gigabytes of RAM to flash memory and then reading it all back in again when powering up. The amount of energy required for the writes is high compared to the amount of time RAM can idle for in a low power maintenance state.
Re:I don't get it... (Score:4, Insightful)
I think your situation is more complicated than they plan.
If your RAM is non-volatile, why would you write it to flash memory, and then read it back in? You could just leave that data directly in RAM. Aren't you just describing a hibernation process? With non-volatile RAM, the hibernation process (write, powerdown, powerup, read) completely eliminates the write/read steps.
So you mention that the cost of writes is high compared to a low power maintenance state... That's true, but non-volatile RAM means that not only is the write unnecessary, but so is the low power maintenance state.
(I could of course, have completely misread your post, if so, I apologize. It just seemed like you were describing hibernation)
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I see this being more useful for storage controllers.
The ratio of NAND to DRAM is too high for system memory, and the CPU memory controller would have to support it before it could even be installed.
Re:I don't get it... (Score:4, Interesting)
The point is not read caching, it's write buffering. Essentially RAM-speed (both number of transactions per second and bandwidth) writes as long as working set is sufficiently small while maintaining the promise of persistence.
Weakness is that buggy hardware or software might be capable of wider variety of modes of corruption to the data than with devices that look like disk to the OS. Also, in order OSes to benefit of this kind of memory, they must be able to recover non-flushed data after a crash, and in order to reduce overheads, OSes must be capable of allocating this sort of memory for dirty storage buffers (unless all memory in a system is such).
Re:I don't get it... (Score:5, Insightful)
Authorities won't need to freeze RAM sticks anymore to extract encryption keys in memory when seizing servers?
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Maybe the encryption software needs to detect an open case or unusual drop in a temperature sensor and destroy the keys followed by an automated disk wipe?
Re:I don't get it... (Score:4, Interesting)
That would be extemely dependent on the hardware setup, and thus isn't workable since each system designer would have to build in such features not just in a standard manner, but in a manner that wasn't easily circumvented. Therefore, that's not something you are going to ever see.
Once the physical hardware is accessed, that's pretty much the point where the strength of encryption relies upon static protections.
Vampire taps into the Disk Drive's cables can easily prevent the disks from being erased (since we aren't likely to see disks with built in deadman switches...)
A software deadman's switch-like process is likely your best bet, and about the only thing you can really do at that point is to increase the polling frequency of the switch. So instead of checking the 'I'm alive' signal every 10 minutes, it would check it every 10 seconds.
Not that there aren't precautions a system designer can take, but for non-custom hardware designed specifically with anti-tamper features in mind, it's just going to be an academic exercise because encryption software must always strike a balance between security and accessibility. What's the point of data if you can't access it when you need to? Any increase in 'tripwires' that locks up the data will decrease in the data's accessability to the person who should have access to it.
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My first thoughts were along those lines. Non-volatile memory will require a good deal of re-thinking about security. If you don't want your system state to be recoverable by your girl friend or the district attorney, you'll have to take measures to ensure that system state is NOT saved at shut down.
Then, there are power failures. The dog ran under the desk, and came out with the end of your power cord draped between his ears. The UPS isn't much good in that case. So, how does the system handle this, w
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My view of memory has changed over the last few years. I now view ALL storage/memory as a single contiguous space, measured in speed/latency and measured by distance.
Closer Memory is faster, further Memory is slower.
Processor Cache (tiered), RAM, NAND/SSD, Magnetic Media/Drives, Cloud etc are all contiguous at some level. This view changes how we look at storage and how we will design systems in the future. The only issue is measuring volatility of the storage media and risk of loss. Closer Storage tends to
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Authorities won't need to freeze RAM sticks anymore to extract encryption keys in memory when seizing servers?
Please share more details. I am curious in knowing about this "freeze RAM sticks" -- the part about freezing. This is new to me, I want to know what it is and how it is done! :)
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Bon Appetit:
http://citp.princeton.edu/research/memory/ [princeton.edu]
Re:I don't get it... (Score:5, Interesting)
There are a few suggestions already, but here are some more.
If your system is doing nvram synchronization of system ram, that means that a suspend to nvram is almost instant, and since the copy from the nvram does not need to go through the disk subsystem on your motherboard (northbridge or sata controller) but can be handled directly by the system memory itself, it can significantly improve boot up time. I don't think it would be instantaneous, but it very well may be within a ping round trip for a web server to come up, process the ping and actually respond, perhaps go back to suspend until there is real traffic to attend to. (Though responding to a ping might be relegated to an improved ethernet controller, why start up the main system for a simple icmp request.) As a result of not having this system on when there is no actual traffic to handle means that you can save power even more than doing dynamic processor clock adjustments.
Alternatively if you are doing write buffering you can reserve a portion of your buffer for boot up system files that can load into memory on a cold start, so you don't have to wait for the hard drive to spin up from cold, and again is faster than plugging a usb3.0 memory stick into a usb port on the computer. Optimize the collection of files to be loaded there and you may be able to get a complete boot off the memory without touching the hard drive.
Extended logging into nvram so that the system can capture what is going on when it can't write/read the hard drive or flash drive because of a problem on the system board.
As prices go down, diskless laptops become completely diskless with apparent instant-on, instant suspend capabilities. Possibly even shutting down the system when there is no I/O happening. (GPUs on video cards could easily take over things like updating the clock on the display, shutting down the display after a cetain period of idle time, or even when sensing the laptop has been closed.)
Write buffering means that storage is journaled without having to do journaling on the hard drive. A side effect is that in a raid5 array if a physical drive fails during a write, you can redistribute what was written, and so long as you maintain two or more physical drives, can rebuild the array contents to maintain redundancy on the off chance that another drive fails before you get the first rebuilt. (something like that is going to take additional coding in the server OS, and means that the raid5 is going to be software rather than hardware based.)
Those are just a few ideas off the top of my head.
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Well for one thing, you shouldn't trust your UPS quite that highly. Saying, "I have a UPS, so why not store important information in volatile RAM?" is a bit like saying, "Well I'm wearing a seatbelt, so why not drive drunk?"
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Being more concerned with write limits on RAM than a power loss shows you don't understand this problem at all.
You will never exhaust the write limit on this type of memory, there is no write limit for the RAM and you only write to flash on power failures that you aren't concerned about. Meanwhile, those batteries suck compared to capacitors and are getting replaced by caps even for conventional backed up RAM. Finally, requiring "some form of iLo/DRAC type monitoring" is an admission of the inferiority of
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Yep, many RAID vendors already switched to the supercap/flash combo a few years ago.
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Normally, writes to disk can't be confirmed faster than one per full revolution of the platters. Thus, a 7200 RPM disk can not perform more than 7200 transactions a minute.
It can perform transactions at a much higher rate than that by using group commit, and any performance-sensitive system (including journaling file systems) will indeed use group commit. But the mean latency for any one commit does end up being limited to the time to perform half a disk rotation, and that's what non-volatile DIMMs are about - reduced I/O latency.
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"Normally, writes to disk can't be confirmed faster than one per full revolution of the platters. Thus, a 7200 RPM disk can not perform more than 7200 transactions a minute."
This is untrue.
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Storage controllers already offer both volatile and non-volatile for caching. NVRAM can survive power losses and surprise reboots without data loss or corruption.
Some controllers have volatile RAM backed up with a battery so that outstanding writes can be committed to media once the power is restored.
I imagine the NAND/DRAM hybrid will cache reads in DRAM and writes in NAND, or else it will use very small batteries or modest capacitors to migrate pending writes to NAND when there is an unanticipated system
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The first advantage is reduced complexity of software. The second is that the local capacitors recharge relatively fast compared to a UPS. With a UPS, full performance can't be achieved until the batteries are recharged. That can take quite a while and result in longer effective downtime.
Comments (Score:2, Funny)
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Why does comment posting not work this thread..?
No idea. :o(
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If they are already destroying old equipment, this won't really change anything. It may prompt an ominous memo or two reinforcing the habit.
Notice the trend? (Score:1)
AMD A10 gets a substantial to it's graphics, making a decent single chip CPU/GPU combo.
Ram gets flash.
Intel do a NUC, tiny PC.
Now if only they can get the size of the desktop PC into a decent tiny form factor, keeping a decent amount of processing power, lose some of the fan, and keep the terabyte plus of disk space, the PC can get refresh.
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A substantial to it is graphics? A bit early in the morning to post, eh?
Do not want... (Score:5, Insightful)
It is bad enough that flash is worming its way into hard drives, but memory? True non-volatile memory like MRAM would be interesting, but I don't want unreliable and short-lived garbage like flash soldered together with other components. All this does is ensure that devices will be destined for the landfill that much earlier, but of course that is a "feature". There ought to be laws enacted to prohibit non-replaceable consumables, wether batteries, flash memory, or whatever else.
While on the subject of memory features, ECC should be first on the list.
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Flash memory is completely replaceable. Buy more in 5 years like you would anyways. ECC? They already make that
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You stole my comment, you insensitive clod! Where's my MRAM?
There ought to be laws enacted to prohibit non-replaceable consumables, wether batteries, flash memory, or whatever else.
I only think there ought to be a labeling requirement. If the RAM, flash, batteries, or other components can't be replaced by the user without a spudger and/or soldering iron then there should be a big fat disclaimer on the box.
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All this does is ensure that devices will be destined for the landfill that much earlier, but of course that is a "feature".
Well ... I guess you choose your DIMMs according to their expected use. JUST LIKE EVERY OTHER COMPONENT IN EVERY DEVICE YOU EVER BUILD!!!
Gaaah!
As for replacing consumable parts - do you replace failed components on motherboards or SSDs? What do you do with a processor that has a single damaged transistor? Some stuff just isn't repairable, but there's a trade off to be made. My phone has a replaceable battery, but the case falls to bits rather easily. Consequently I will probably replace the phone w
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Your mistake was to try and rely on the server. Servers break, no matter how much money you throw at them and how good the parts are. Instead you need to distribute your data and workload.
Flash would be ideal for say a front end web server that needs fast access to cached data. If it breaks there are many others like it already in operation, so it just drops out of the pool until it is fixed.
If you do have to have a single monolithic server... Well, I hope you back it up regularly and can diagnose hardware
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Why would flash memory be non-replaceable? Sure, the stuff that was on it when it failed might be hard to replace, but that's why you keep backups, right?
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ac since i have worked with these parts.
the flash is only used on unclean shutdown after software has used
a sideband interface to inform the part that it should go into save-on-powerloss
mode. so unless you're doing stress testing, the flash should not be
a concern.
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They keep your data in RAM where you read/write most of the time. They are only writing to flash/ssd on shutdown and reading it back in on startup.
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You have a dizzying intellect.
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Will this increase problems with malware? Just wondering.
More room to implement complex features always means more room for exciting failures; but we've already seen (almost) nonvolatile main memory in ordinary computer systems without much incident. In a laptop with some battery life left, or a desktop plugged into the wall, 'suspend' will burn a small trickle of power to keep the memory controller refreshing the RAM more or less indefinitely. As you'd expect, suspending and then waking a system doesn't clear things up the way a good reboot does(and, if it were
Great (Score:5, Funny)
Now Windows problems will not even be fixed with a reboot anymore. Reinstalling will be the only way out.
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Now Windows problems will not even be fixed with a reboot anymore. Reinstalling will be the only way out.
Plus ça change, plus c'est la même chose.
reinstalling... (Score:2)
your RAM!
Two scenarios. (Score:2)
First, if the system presents the DIMM as a contiguous chunk of 'RAM', then this move would be about higher apparent memory capacity at lower cost, and the non-volatile aspect is just a side-effect.
I am also aware of firmware/system design in the enterprise space that would distinctly recognize the non-volatile portion of similarly designed DIMMs and not put it in the memory map, but instead describe it in a block storage sort of way complete with UEFI drivers to make it a boot volume. Basically, SSDs with
access to raw nand (Score:2)
the article isn't loading for me, so it's possible that this is discussed there ...
but what i'd really like is a block of nand that's accessed directly. SSDs present a block interface and translate the writes to the nand. presumably these dimms continue to present the RAM model to the computer and do some behind the scenes translation
nand has a performance characteristic that is quite different from both RAM and block devices, and shoehorning it to look like one or the other is limiting it's usefulness. eg,
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SSDs only let you do a single write to a block before erasing it, but you can actually continue to update a block - it's just that the bits are additive. for some algorithms this would be useful
What kind of algorithms?
Embedded systems do this already (Score:4, Interesting)
I was thinking of this very scenario not too long ago. Many ARM (and other archs) embedded microcontrollers support external memory busses which can have a mix of SRAM, SDRAM and Flash. The flash can hold a binary image and/or a flash file system. I imagine the combo DIMMs would provide you with a similar setup, allowing a flash file system along with standard DDR RAM on the same memory controller.
I must admit that I can't wait to see performance numbers for read speeds. Using it as a frequently written cache is a stupid idea as you will wind up wearing down the flash BUT if its used to cache frequently read files then you really have something. What would be interesting is if you could use execute in place [wikipedia.org] to run software directly from the flash. There could be a mechanism where the flash disk is mapped into the file system. The OS or the user can decide which files can be loaded from disk to flash cache and a link or pointer now points to the flash instead of the disk making it transparent. Loading a program could be done in a few seconds. The OS could even map system files to the flash so booting could take seconds and energy saving suspends or shutdowns can resume in a second or so.
I imagine it would be a great boost for gaming, probably the biggest (and most likely target) market for these DIMMs. Games would benefit greatly from the break neck load speeds brought about by having the game already in memory. Gigabytes of game files can be loaded into flash and you can jump right into the game. Game save states could be loaded into flash and instantly recalled. Half life brought us the continuous game experience where there are brief load points between sections instead of load screens. Now that can be turned into continuous game play as all game data is already in a portion of main memory.
I think they might not benefit much else, maybe video editing but I think you would need over 100GB of flash storage for it to be useful. Using flash might not be the best idea but its the cheapest highest capacity non volatile memory we have at the moment. CellularRAM (PSRAM) and MRAM are other contenders but capacity and availability are an issue. MRAM is still in development and PSRAM is available but currently its suck at 16MB capacities.
And lastly, people assuming your encryption keys could be pilfered, the flash will not be used as RAM. It can't because Flash can't be written to on a per address basis like RAM (BUT MRAM and PSRAM can). But if you suspend by writing memory contents verbatim to flash, then you have a problem. My guess would be it might be possible to partition the memory so sensitive RAM contents would be discarded. Its up to the OS makers to implement these mechanisms. I imagine Linux and the BSD's would be most concerned about these potential security pitfalls and ensure this does not happen. I would like to think both Microsoft and Apple would be smart enough to also avoid such a glaring security hole. Maybe we can have a memtest like utility either in ROM or disk that zeros out the FLASH as a boot option.