Spintronics Used To Create 3D Microchip 28
Zothecula writes "A major obstruction to the development of practical 3D microchips is moving data and logic signals from one layer of circuitry to another. This can be done with conventional circuitry, but is quite cumbersome and generates a good deal of heat inside the 3D circuit. Physicists at the University of Cambridge have now developed a spintronic shift register that allows information to be passed between different layers of a 3D microchip. 'To create the microchip, the researchers used an experimental technique called ‘sputtering’. They effectively made a club-sandwich on a silicon chip of cobalt, platinum and ruthenium atoms (abstract). The cobalt and platinum atoms store the digital information in a similar way to how a hard disk drive stores data. The ruthenium atoms act as messengers, communicating that information between neighbouring layers of cobalt and platinum. Each of the layers is only a few atoms thick. They then used a laser technique called MOKE to probe the data content of the different layers. As they switched a magnetic field on and off they saw in the MOKE signal the data climbing layer by layer from the bottom of the chip to the top.'"
Sputtering is experimental? (Score:3, Informative)
Sputtering [wikipedia.org] is experimental? News to me.
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Re:Sputtering is experimental? (Score:4, Insightful)
Well, certainly, making aggrieved comments by sputtering about the OP is past the experimental stage.
(disclaimer: I ran sputtering machines in 1974 and they sure as heck weren't new then)
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Get off my lawn! I was involved in a sputtering project, production not experimental, in 1968.
It is a well-known industrial method for various kinds of non-obvious plating, such as aluminum on PVC. In the experience I referred to above, aluminum, platinum and/or gold were layered onto glass and silicon substrates.
It is how the aluminum interconnect layer is deposited on silicon chips, after all.
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Sputtering [wikipedia.org] is experimental? News to me.
A statement pretty much everyone who ever owned a Chevy Corvair would be hard pressed to disagree with.
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As ironic as ra-a-a-iane on your wedding day.
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Maybe by "experimental technique" they meant "a technique that is used in experiments",
Indeed. It is an "experimental technique" rather than a "theoretical technique" or a "computational technique", say. It's frustrating to read an abstract of a physics paper which sounds like the authors have performed a nifty measurement, only to find that in fact they are proposing an idea, or have performed a simulation, or theoretically analysed the problem. (Don't get me wrong, they're all equally important things, but not the same as performing an experiment). Thus, it's nice to emphasise one's "experi
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I have no background on this kind of thing so i'm sure someone will come along here and happily correct me if i'm wrong, but the link you provide about Sputtering doesn't seem to have anything to do with what they're doing here.
They're using Sputtering, but in a new way. I'd consider that experimental for most pratical purpuses. One can make a fire and demonstrate quite easily that boiling water produces steam. However when Heron played around with the idea and invented a (rather impratical but somewhat
tell that to Seymour Cray (Score:5, Informative)
the 1-X had several layers of chips stacked under the epoxy in the ALU section. had a guy in a class who worked in chippewa falls show me a naked chip, pretty cool.
the technique has been around a while, and chip on chip with one reaching over the divide to another stack has been around for quite a while, too. called "dead bug" assembly.
sputtering has been around since the planar transistor, and before that, in putting the active layer on vacuum tube cathodes.
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There are relatively few links between the layers, though. The idea here would be to go from a multi-core processor that's, for example, basically just 8 flat processors sitting one on top of the other with some shared components here and there to a multi-core processor where the 8 individual processors are arranged more like eight spheres clumped together with shared components filling in the gaps. Moving from 2D to 3D could mean packing all the actual components a lot closer to one another, allowing signa
Possibly the least laymans summary yet (Score:2)
Come On, Slashdot! (Score:2)
You guys are slipping.
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If it is magic MOKE, you see, then that signals that you need a new 3D chip.
I wonder (Score:2)
Hmm (Score:2)
Probably an obvious question but what advantages are we expecting out of 3D microchips that can't be gotten already from massively parallel systems, just a footprint saving or is there more?
Costs... (Score:2)
They effectively made a club-sandwich on a silicon chip of cobalt, platinum and ruthenium atoms
So back of the envelope math based on current die sizes, quoted thickness from the article (several hundred nanoscale layers) and $1600/troy oz price for Pt yields an added material cost of roughly $0.12/chip. So, cheaper than I was expecting.