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Live Interview: Luke Leighton of Rhombus Tech 68

Today we're doing a live interview from 18:30 GMT until 20:30 GMT with long time contributor Luke Leighton of Rhombus Tech. An advocate of Free Software, he's been round the loop that many are now also exploring: looking for mass-volume Factories in China and ARM processor manufacturers that are truly friendly toward Free Software (clue: there aren't any). He's currently working on the first card for the EOMA-68 modular computer card specification based around the Allwinner A10, helping the KDE Plasma Active Team with their upcoming Vivaldi Tablet, and even working to build devices around a new embedded processor with the goal of gaining the FSF's Hardware Endorsement. Ask him anything. (It's no secret that he's a Slashdot reader, so expect answers from lkcl.)
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Live Interview: Luke Leighton of Rhombus Tech

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  • Re:New SOC ? (Score:4, Informative)

    by lkcl ( 517947 ) <> on Tuesday December 11, 2012 @03:23PM (#42253167) Homepage

    What can you tell us about the new SOC?

    well, people have worked out that it's using ICubeCorp's design.

    I've heard that instead of a separate GPU that it contains more 3d type instructions as part of the native architecture.

    yes. if you're familiar with MIPS64 and/or ARC (from synopsys) and/or Tensilica's DSPs, it's more like an extended instruction set that gets "farmed off" in some cases to entirely different engines, with their own pipelines. in this case, it's a suite of engines with their own hardware threads.

    How long before we actually see these being produced?

    from funding to actual silicon? as we're basically doing nothing more than "take some hard macros, add them, and put it through the verification tools" i.e. there is NO development (because the core has already been done, and proven), we've set a target of 8 months.

    actually what we're probably going to do is simply add USB-3 host to the existing 65nm design, bump it up to 8 cores (from 2), and then have a *separate* team design a "USB3 Peripheral IC" with SATA-III, Gigabit Ethernet and so on. even if the two wafers end up on the same chip. what's great about that is that that USB3 peripheral IC is itself a great stand-alone product, so we're talking to a couple of teams (including some open hardware designers) about how to get this done.

    And which compilers are they targeting for this new instruction set?

    they have a compiler expert from SGI on-board, so they've ported Open64. and it has LLVM support as well. amazingly. open64 is an entirely different compiler, but a long time ago when it was started, they took the gcc front-end GPLv2 source code and used that - just wrote a different back-end. so, for the most part, the options are pretty much identical so you can do "EXPORT CC=..." and go from there.

    (something to do with the architecture, Open64 is a better choice for them than beginning from gcc's back-end).

Never buy from a rich salesman. -- Goldenstern