MIPS Technologies Porting Android 4.1 to MIPS Architecture 100
angry tapir writes with news on Android getting support for a third architecture. From the article: "ARM rival MIPS is continuing its push to make a mark in low-cost tablets and quickly trying to bring Android 4.1 (Jellybean) to its processors. 'We are working aggressively on bringing Jelly Bean to MIPS, and expect that it will be available to our licensees very soon,' said Jen Bernier-Santarini, director of corporation communications at MIPS, in an email. Tablets with MIPS processors are largely low-cost and have found buyers mostly in developing countries. MIPS last week said a new tablet called Miumiu W1 from Chinese company Ramos would become available in a few months in India, Latin America and Europe. The tablet has a 7-inch screen, a MIPS processor running at 1GHz, front camera and a microSD slot for expandable storage."
In case you're wondering (Score:5, Informative)
By the way, if you're wondering as I did but were too lazy to look it up, yes, they actually named themselves MIPS without noticing that that's also Millions of Instructions Per Second, a method for measuring the speed of any CPU. Theirs stands for Microprocessor without Interlocked Pipeline Stages and it refers to an instruction set. What an unfortunate oversight. Stages could have been replaced with just about any other word to differentiate it.
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Unless it was an intentional usurpation, like Microsoft's uses of .NET or DNS.
(Someone here made a comment about that; if I could find it I'd link it.)
Re:In case you're wondering (Score:5, Interesting)
Re:In case you're wondering (Score:4, Interesting)
OEM chip prices like the Tegra 3 at $35
As a comment to a recent anti-Ouya story on Slashdot pointed out, even the data sheet for the Tegra 3 is available only to the highest volume manufacturers.
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It's probably actually higher grade. The massive power output of a 50-200W processor is due to leakage--that is, it's due to poor efficiency. The Intel Atom for example was designed to leak less, and Intel's tighter packaging and lower TPD CPUs are based on new fabrication process that allows greater electrical efficiency. Bloated, poorly thought out designs bleed power as standing static field and heat--standing static field prevents smaller process, i.e. an imprecisely made junction will work on a 90nm
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Nvidia, dickish on providing specs? Impossible!
Companies making complex chips don't like releasing specs to all and sundry because someone might read them and realise they've broken a patent that they'd never previously heard of.
No specs even to (low volume) integrators (Score:2)
Companies making complex chips don't like releasing specs to all and sundry
The problem comes when the maker of a component doesn't release specs even to companies integrating the component into a (lower-volume) product.
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OEM chip prices like the Tegra 3 at $35 for a quad core 1.4GHz with a fifth extremely-low-power core bounded to 500MHz in single processor mode? With a full system-on-chip including system bridges, memory controllers, and full nVidia graphics, $35 is ridiculous. Why a quad core Sandy Bridge processor doesn't cost half that!
Is that a sarcastic question?
Tegra 3 and ARM in general is low power because it's small. You probably can pack 20 ARM cores inside a Sandy Bridge Core, even the Intel Atom, the smallest x86 core, is big next to an ARM core. You are comparing Apples to Oranges.
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Good, finally ARM manufacturers will stop having a monopoly where they can charge whatever they want. I've seen hints at OEM chip prices and they're ridiculous compared to even desktop chips.
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Good, finally ARM manufacturers will stop having a monopoly where they can charge whatever they want.
I though ARM processors were really inexpensive, we keep seeing cheaper and cheaper tablets, computers like the RaspberryPi, MK802, etc, all based on ARM
ARM have a monopoly, yeah, but it's because they're really better on price, performance and power consumption (AFAIK)
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You realize the Raspberry Pi only hits that price point due to heavy subsidizing by Broadcom, right?
Re:In case you're wondering (Score:4, Informative)
Good, finally ARM manufacturers will stop having a monopoly where they can charge whatever they want.
I though ARM processors were really inexpensive, we keep seeing cheaper and cheaper tablets, computers like the RaspberryPi, MK802, etc, all based on ARM
ARM have a monopoly, yeah, but it's because they're really better on price, performance and power consumption (AFAIK)
They are. But people always want cheaper and see monopolies where they want. To compare, we are currently in the process of replacing a 50 euro PowerPC chip with an 7 euro ARM chip, which is faster and more capable.
Re:In case you're wondering (Score:4, Informative)
They've been around for ages... Anyone who might need/want to know the architecture can easily differentiate MIPS from MIps, just ike everybody can distinguish ARM from arm.
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Then what do you say to StrongARM?
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I'm still bitter after trying to eat my Apple.
And my Commodore was a terrible military strategist.
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My Mega Drive couldn't even reach the pedals
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I think that both are properly capitalized as "MIPS". Why Mips or MIps? Unless you also say also Mflops?
Well, thankfully it doesn't matter anymore as no processor is measured in MIPS or MFLOPS. Even low power chips are in the range of Giga.
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Why MIps? I prefer it because:
Capital M for decimal Mega (as in million)
The i is kinda indifferent, but since Mips is the rabbit in Super Mario 64, I prefer a capital I
Lowercase p for "per"
Lowercase s because SI units are lowercase unless they're named after a person.
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Stages could have been replaced with just about any other word to differentiate it.
Yeah, like Steps! ...oh wait...nevermind.
Re:In case you're wondering (Score:5, Insightful)
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That's interesting!
If you have the time, I'd love to hear which were your favourite SoCs and which were the worst to work with - especially if you can comment on what were the distinguishing factors that made them a joy or pain to work with.
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MIPS has been around for some time. They used to make RISC processors for workstation class machines and even had a Windows NT distribution that was geared to high performance floating-point operations. This was in the early nineties when there were competitors in the 32-bit windows platform. DEC-Alpha, Intel, MIPS all had versions of Windows NT, and there were versions of AutoCAD, 3D Studio, and some of the Adobe products as well.
MIPS biggest success at the time was their use in SGI workstations that fu
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MIPS also produced the processor at the heart of the N64.
And the PS2 and PSP and multitudes of routers and set top boxes.
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One advantage MIPS has over ARM, is that while higher end and server class chips are new to ARM, MIPS was doing 64bit server-class chips and massive multiprocessing years ago... There is already a well defined MIPS64 architecture, complete with mature compilers and OS support.
Instead of targeting cheap and lowend, they should be going after low power servers...
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Fully agree w/ all of the above posters. If any CPU has covered the entire spectrum of low power to high performance, it's been MIPS. Alpha used to be known for its excessively high power dissipation, PPC's low power offerings rarely was low in power consumption, ARM rarely had the performance, while PA-RISC and SPARC hardly played in the low power space. It's tragic that MIPS has lost the console market to the PPC, but they can still recoup w/ both tablets and low power servers. Currently, AFAIK, it's
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MIPS is still big in networking; see Cavium and Raza/NetLogic/Broadcom.
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I've actually been trying to buy a Loongson-3, but they don't seem to be available anywhere... They published pictures of various motherboards, but none of them seem to be available to buy.
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One disadvantage MIPS has is that it has a completely batshit insane architecture full of things that kind-of vaguely made sense in a research project and have been a liability for over a decade.
I'm currently working the MIPS back end in LLVM and every day brings a new WTF. ARM, at least, has a mostly sane architecture and in the 64-bit variant has removed a load of stuff that doesn't make sense with newer pipeline designs (e.g. store multiple, conditional adds, and so on). MIPS just accumulates legacy
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For some reason I looked at the MIPS Web site the other day and they have no 64-bit cores. It looks like they've completely abandoned 64-bit.
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This is either either comedy or extreme stupidity, but I can't tell which.
Fragmentation (Score:5, Insightful)
Great. Now we'll see the same fragmentation Windows CE had all those years. Most games use the NDK and contain binary compiled specifically for ARM. Obviously those apps will not run on the MIPS processor. Microsoft eventually learned this was not a good thing and finally forced all OEMs to use ARM to qualify for Pocket PC branding.
Now all we need is Android running on SH3 and we'll have gone full circle.
Re:Fragmentation (Score:5, Insightful)
Great. Now we'll see the same fragmentation Windows CE had all those years. Most games use the NDK and contain binary compiled specifically for ARM. Obviously those apps will not run on the MIPS processor.
The NDK now has MIPS support out of the box. Going forward it would probably be a good idea to compile for all supported targets.
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Or handle it at the market stage, and only send/store the appropriate binaries based on the device installing it...
Re:Fragmentation (Score:5, Informative)
Re:Fragmentation (Score:5, Insightful)
Also, if conditional prefixes were so great, why's ARM64 eliminating them.
ARMv8 is not eliminating them, it's reducing the number of instructions that have them. Conditional instructions are useful because you can eliminate branches and so keep the pipeline full. For example, consider this contrived example:
On ARMv7 and earlier, this would be a conditional add. The pipeline would always be full, the add would always be executed, but the result would only be retired if the condition is true. On MIPS, it would be a branch (complete with the insanity known as branch delay slots, which if you look at the diassembly of most MIPS code typically means with a nop, so you get to waste some i-cache as well) and if it's mispredicted then you get a pipeline stall.
On ARMv8, you don't have a conditional add, but you do have a conditional register-register move and you have twice as many registers. The compiler would still issue the add instruction and then would do a conditional move to put it in the result register. From the compiler perspective, this means that you can lower PHI nodes from your SSA representation directly to conditional moves in a lot of cases.
Basically, 32-bit ARM is designed for assembly writers, ARMv8 is designed for compilers. As a compiler writer, it's hands-down the best ISA I've worked with, although I would prefer to write assembly by hand for ARMv7. I wouldn't want to do either with MIPS, although I currently am working on MIPS-based CPU with some extra extensions.
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ARMv8 is not eliminating them, it's reducing the number of instructions that have them. Conditional instructions are useful because you can eliminate branches and so keep the pipeline full. For example, consider this contrived example:
On ARMv7 and earlier, this would be a conditional add. The pipeline would always be full, the add would always be executed, but the result would only be retired if the condition is true. On MIPS, it would be a branch (complete with the insanity known as branch delay slots, which if you look at the diassembly of most MIPS code typically means with a nop, so you get to waste some i-cache as well) and if it's mispredicted then you get a pipeline stall.
On ARMv8, you don't have a conditional add, but you do have a conditional register-register move and you have twice as many registers. The compiler would still issue the add instruction and then would do a conditional move to put it in the result register. From the compiler perspective, this means that you can lower PHI nodes from your SSA representation directly to conditional moves in a lot of cases.
Basically, 32-bit ARM is designed for assembly writers, ARMv8 is designed for compilers. As a compiler writer, it's hands-down the best ISA I've worked with, although I would prefer to write assembly by hand for ARMv7. I wouldn't want to do either with MIPS, although I currently am working on MIPS-based CPU with some extra extensions.
Actually, ARM's reasoning is that modern branch predictors on high end AP's can do a good enough job of following a test and branch and keeping the pipeline(s) full that there is very little value in conditional instructions on future chips. It's hard to cause a pipeline stall or bubble by branching a few instructions forward or back on these CPUs since they are decoding well in advance of the execution pipelines. Added to that, there is an energy cost in executing an instruction and throwing away the resu
Re:Fragmentation (Score:5, Informative)
ARM uses some 0.1-1.0W, MIPS uses 10-20W for slower clock speeds.
Not anymore, by far. Forget about MIPS as in Silicon Graphics workstations ages ago. Now MIPS is an embedded IP provider, very similar to ARM. And they do have low power cores quite similar to ARM. Who is on top in mW/MHz changes over time, but MIPS do have some competitive offers.
Now what ARM has for it is that it became the defacto architecture for mobile (nobody got fired to chose ARM and all that), and it has much more resources than MIPS. So ARM has a more extensive IP offer, and can work on process optimization too. By this I mean that where MIPS will provide a soft core in RTL, ARM can also provide hard macros optimized for some fab process. And even if you want to go soft core and optimize yourself, ARM can provide a ready to use optimization package to get you started.
ARM has fixed-width single-decode instructions; MIPS has three types of instructions of variable width.
No, they're actually very similar: their native instruction size is 32 bits, but both support a 16 bits instruction mode which is in its second generation in each case (Thumb2 for ARM, can't remember the MIPS name... Maybe MIPSe?).
MIPS is slow. You may as well put an Intel CELERON in there if you go MIPS.
Why the comparison with a discrete chip? MIPS do no sell discrete chips anymore, it's all IP. Then in IP they have offer that are performance competitive with the same class ARM. I'd give the edge in the high end to ARM though, thanks to their close work with the fab to optimize their implementation.
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I don't know where you get your information from. MIPS processors have had a much higher DMIPS/MHz than ARM CPUs for as long as I can remember.
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Mod parent down!
MIPS 10-20W? you cannot drop numbers like that without any citation! I have in my hand a PIC32, a full MIPS that consumes some milliwatts. MIPS and ARM are Instruction sets, not CPUs. There are slow and fast implementation of the ARM ABI, and slow and fast implementations of MIPS ABI.
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Most games use the NDK and contain binary compiled specifically for ARM. Obviously those apps will not run on the MIPS processor.
Um... Unless they are recompiled to run on MIPS? I don't really see the problem as GCC already supports this.
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Now all we need is Android running on SH3 and we'll have gone full circle.
The newest Renesas application chips are based on ARM, with a SH4 core only as a coprocessor, so this particular monster will probably never exist.
Restricted boot (Score:2)
Incidentally... (Score:5, Interesting)
Was there a fuckup or an epic design win at some point in the past?
Re:Incidentally... (Score:4, Informative)
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MIPS is stuck in an unfortunate limbo between ARM and PowerPC. They lost the home console market to PowerPC (PS1, PS2, N64 were MIPS, but NGC, 360, Wii, PS3 are PowerPC). They lost the portable console market to ARM (PSP was MIPS, PS Vita is ARM, and Nintendo went straight from Z80 to ARM). They're still popular for el cheapo home routers, but they're being squeezed by ARM on one side (small servers/plug-boxes/routers) and by PowerPC and Atom on the other side (NAS, larger home servers). Pro networking gear
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As ARM moves higher end, MIPS would be better placed... While ARM is only just coming up with a 64bit variant, MIPS has had one for years and which already has support from linux/gcc/etc.
Going after the cheapest end of the market is probably not the best choice, going after the low power server and highend tablet/smartphone market would make a lot more sense.
Re:Incidentally... (Score:4, Informative)
So the high end may be tough for MIPS. But in the medium end, where price is critical and performance less so, they can be an interesting choice.
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Whereas ARM is prolific in consumer-grade portable devices (phone, tablets, etc), MIPS is more prevalent in embedded devices and datacenter appliances. Especially in the networking field, for some reason. A lot of wifi access points, routers, and "modems" have MIPS inside. (WRT54G, for example.) High-end network gear from Cisco, Radisys, and other manufacturers often have dozens of MIPS cores per device to move packets from one network subsystem to the next.
As far as I understand it... (Score:2)
MIPS - there's a blast from the past (Score:4)
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the old DECstations (not VAXstations) used MIPS chips inside. I still have an r3000 or something lying around. ultrix 4.2 was the last I remember of that series. seems like more than a lifetime ago.
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Goodbye closed interface (Score:1)
MIPS for super computers (Score:1)