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Hardware Technology

MIT's Self-Assembling 3D Nanostructures — the Future of Computer Chips? 30

MrSeb writes "MIT has devised a way of creating complex, self-assembling 3D nanostructures of wires and junctions. While self-assembling structures have been made from polymers before, this is the first time that multi-layer, configurable layouts have been created, opening up the path to self-assembled computer chips. Basically, MIT uses diblock copolymers, which are large molecules formed from two distinct polymers (each with different chemical and physical properties). These copolymers naturally form long cylinders — wires. The key to MIT's discovery is that the scientists have worked out how to exactly control the arrangement of these block copolymers. By growing tiny, 10nm-wide silica 'posts' on a silicon substrate, the researchers can control the angles, bends, spacing, and junctions of the copolymer wires. Once the grid of posts has been built, the wafer is simply covered in the polymer material, and chip's wires and junctions self-assemble. The reason everyone is so excited, though, is that the silica posts can be built using equipment that is compatible with existing semiconductor fabs. Theoretically, chips built using this technique could have a much smaller feature size than the 28nm and 22nm chips produced by TSMC and Intel. According to Caroline Ross of MIT, it should be possible to build posts that are much smaller than 10nm."
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MIT's Self-Assembling 3D Nanostructures — the Future of Computer Chips?

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  • by Anonymous Coward

    I for one welcome our new nanite overloads!

  • by scubamage ( 727538 ) on Friday June 08, 2012 @02:09PM (#40261101)
    Just curious - i thought one of the limits here was that eventually you hit a point where an electron can no longer freely pass through the conductor. I could be wrong (I am in no way an EE).
  • is this the self-repairing hull i read so much about when i was the innocent kid ?
  • by girlintraining ( 1395911 ) on Friday June 08, 2012 @02:31PM (#40261367)

    We can make it smaller, but we still can't alter the thermodynamics of the system: Specifically Black's Law -- the more current you pump into a given area, the more heat it's going to give off. Electromigration is a already a significant engineering barrier to further minaturization. Nanowires are going to break down even faster than existing circuit etchings.

    I'm sure there's an EE reading this who can provide the grisly details of how circuit pathways would degrade, and the equations showing the reduced MTBF. But it's my lunch break right now, and I'm lazy. :)

    • Maybe you could make chips fault tolerant. You buy a 1024-core processor. After a year, it's down to 900. After two years, 800. By three years it's performing half as well with only 500 cores not failed, and at that point you go and buy a new one.
    • Electromigration doesn't happen in conductors that have only covalent bounds. It is a problem exclusive to metals.

      Also, you escape Black's Law by reducing the current.

  • by PaulBu ( 473180 ) on Friday June 08, 2012 @02:32PM (#40261377) Homepage

    ... so, the claim is that one can build self-assembled circuitry, but you are still using 10nm "silica posts [...] built using equipment that is compatible with existing semiconductor fabs", i.e., you are still running your wafers through 10nm-capable semiconductor process for at least one step. If you have access to such a process, why not build wires using it as well, while we are at it?

    Iast time I checked, metal ions in deposition chambers also "self-assemble" themselves into metal films, subsequently selectively etched and producing wiring on each and every chip currently made! ;-)

    Paul B.

    • by Anonymous Coward

      So there has to be one fab that builds one standard blank. Then those blanks can get shipped anywhere, possibly including your garage, and filled in with arbitrary circuits by means much (hoped to be) much cheaper than a full fledged fab.

      Anybody could design chips and turn them around quickly. You could build chips without disclosing your design to a fab, and without worrying that the fab has messed with it (huge security issue). Possibly the economically viable volume for a design could be smaller.

      And it

      • by PaulBu ( 473180 ) on Friday June 08, 2012 @04:05PM (#40262501) Homepage

        I do not think that it will be "one standard blank" -- from how I imagine it works, post positions determine ends and T's of the "wires", so, good luck with "arbitrary circuits"... From TFA:
        "By carefully controlling the initial spacing of the posts, Ross explains, the researchers were able to set the spacing, angles, bends and junctions of the cylinders that form on the surface."

        Of course, this can as well be a great achievement, for other, more biologically-connected purposes, but I am getting tired of generic "This is the way to make next-gen chips" hype, just call it what it is, a decent advance in nanotech, mixing semiconductors and long molecules, but do not hold your breath for the next Pentium to come out of it! ;-)

        As to "Anybody could design chips" part -- well... Your world is much luckier than mine! ;-)

        Paul B.

  • by Anonymous Coward

    Well, they're a school. But some of these advances are from the controlled release of technology given to us by extraterrestrials. Part of the agreement we made so they can mutilate cows and do experiments on some humans without interference.

Think of it! With VLSI we can pack 100 ENIACs in 1 sq. cm.!

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