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Data Storage Intel Upgrades Hardware

Intel and Micron Unveil 128Gb NAND Chip 133

ScuttleMonkey writes "A joint venture between Intel and Micron has given rise to a new 128 Gigabit die. While production wont start until next year, this little beauty sets new bars for capacity, speed, and endurance. 'Die shrinks also tend to reduce endurance, with old 65nm MLC flash being rated at 5,000-10,000 erase cycles, but that number dropping to 3,000-5,000 for 25nm MLC flash. However, IMFT is claiming that the shrink to 20nm has not caused any corresponding reduction in endurance. Its 20nm flash uses a Hi-K/metal gate design which allows it to make transistors that are smaller but no less robust. IMFT is claiming that this use of Hi-K/metal gate is a first for NAND flash production.'"
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Intel and Micron Unveil 128Gb NAND Chip

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  • by malakai ( 136531 ) on Wednesday December 07, 2011 @01:58PM (#38293026) Journal

    This isn't about storage size. That war is lost for the desktop ( see Bloatware ). If it wasn't for smart phones and tablets cause people to still think about storage size for some applications, it would be even worse.

    When we talk about SSD drives vs HDD drives, were are primarily talking about drive bandwidth and access times. SSD's have no seek time, no spin up time, and their bandwidth in read/writes are at least 2x as fast, and can be up to 4x or 5x as fast.

    Think of the engineering and time that goes into making an application 'snappy' to load. Like say Chrome or Word or Photoshop. Now weight that engineering cost vs simply installing an SSD. Now you see how this is going to affect future software development.

    But GP ( or uncle, or 2nd cousin) is right, this is a Rant. Each of these Moore's law watermarks tend to have similar effects on software development. I think bleeding edge apps ( including games ) generally herald what is to come....

    Buy stock in SSD manuf I guess.

  • by David_Hart ( 1184661 ) on Wednesday December 07, 2011 @02:12PM (#38293180)

    Well, that's the problem, isn't it? Lazy programmers aren't writing efficient code, they're just relying on Moore's Law to push them through. Of course, I don't think the average consumers understand much about efficiency, seeing as eyecandy is so popular, even a selling point.

    Of course the biggest offender of relying on Moores Law is JAVA...

  • by Anonymous Coward on Wednesday December 07, 2011 @03:01PM (#38293808)

    A lot of the tablets, etc. are coming out with eMMC type flash instead of raw flash for internal nonvolatile memory. How come?

    I would think eMMC would be more expensive (has built-in controller) than raw flash chips. And slower, too, because eMMC has no concept of file-systems and therefore cannot do optimal space selection or wear-levelling. I'm sure the teeny, tiny controller in the eMMC does the best that it can, but I'm also sure that JFFS2 and YAFFS manage flash chips a lot better. The only savings I see are is that the device manufacturer has to layout and route a fewer traces on a circuit board when using eMMC.

    Does anyone really know why eMMC is being used?

  • by KingMotley ( 944240 ) on Wednesday December 07, 2011 @03:18PM (#38294020) Journal

    Not exactly. The older SSDs didn't do write leveling. Also, most OSs don't force a write to disk when a single byte in a sector changes (perhaps it does on linux, I don't know). Most SSDs also have write caching today so even if the OS was silly enough to request a write to disk, it would quickly get invalidated by the next request to write to the same sector before it even hit the flash portion of the SSD.

    Lastly, even if you disregard all of that, then you also must realize that you don't need to do an erase if all the changes you are making are turning bits on. In that case, you just do a write instead of erase and write, and that doesn't wear out the SSD at all (I believe).

    Also, there is nothing keeping the SSD from periodically moving data with low write counts to the high write count portions of the disk in the background in hopes that the semi-static data will remain semi-static.

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