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AMD Hardware

AMD Starts Shipping First Bulldozer CPU 202

MrSeb writes "After an awfully long wait, AMD has finally begun shipment of its Bulldozer-based Interlagos (Opteron 6200) server-oriented CPU. If you believe AMD's PR bots, it is the world's first 16-core x86 processor. Unfortunately, and possibly because of reports that AMD is struggling to clock its Bulldozer cores to speeds that are competitive with Intel's Core i7, there's no word of the 8-core desktop-targeted Zambezi CPU. If AMD doesn't move quickly, Intel's Sandy Bridge-E will beat Zambezi to market and AMD will lose any edge that it might have."
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AMD Starts Shipping First Bulldozer CPU

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  • by Chrisq ( 894406 ) on Wednesday September 07, 2011 @08:55AM (#37325634)
    What will be interesting is the price/performance ratio compared to the Intel chips. This chip will be typically used in server farms, and this will be at least as important as the raw power - though obviously there is an overhead in running more servers. AMD has usually been ahead of Intel, and it still is on most mid-range and low-end chips, but it has started to fall behind at the high end [cpubenchmark.net].
  • by serviscope_minor ( 664417 ) on Wednesday September 07, 2011 @09:12AM (#37325764) Journal

    Does anyone know the FPU performance of these things?

    So comparing a 16 "core" 'dozer to a 12 core magny-cours:

    The number of parallel integer (and memory addressing) threads has gone up from 12 to 16.

    The number of FPUs has dropped from 12 to 8.

    The new FPUs are now twice as wide with the AVX instructions.

    So, two threads share one wider FPU now. If it's hard keeping an FPU full, then this should make better use of the hardware. It seems that if your code does well for parallel, scalar FPU work already, then there may be a performance drop.

    If you have trouble filling the FPU for scalar work, then this should give better utilisation of less hardware. There's a possible performance increase if your utilisation is currently under 67%. Since the two core units can feed the FPU independently, there is a little latency hiding now. This could help even if there are two completely independent processes using the FPU at the same time.

    I suppsose the reasoning is that there is often fine-grained parallelism to be had, and the problem of fine grained parallelism and keeping the FPU full are often independent. So AVX will improve performance there.

    So, it seems that the peak FPU performance has increased in the ratio of 16/12.

    The actual performance could be all over the place. It will be interesting to see.

    The other thing is that these are now single chips with 8 bulldozer units on and 16ish cores. Perhaps AMD will go and make more MCMs like before, giving 32ish cores per socket :)

  • Re:Sandy Bridge-E (Score:5, Interesting)

    by sgt scrub ( 869860 ) <saintium@@@yahoo...com> on Wednesday September 07, 2011 @09:32AM (#37325930)

    the immaturity of AMD's 32nm process and things could be expensive for AMD on the desktop.

    That is true, and as you point out, for the desktop. Machines in a data center are cooled so the number of cores is a better measure of functionality. If you build machines that run multiple VM's, which is usually the case, that cheaper 6200 will not only outperform Intel's Gulftown and more likely be preferred when adding more machines to the data center even over the SB-E chips. If AMD can get a better footing in the "cloud" infrastructure they might make enough to move to a die size smaller than 32nm, which is REALLY what they must to do.

  • Re:Sandy Bridge-E (Score:5, Interesting)

    by V!NCENT ( 1105021 ) on Wednesday September 07, 2011 @09:38AM (#37325974)

    Talk to a server farm when Intel is putting money in the development of Coreboot and we'll talk.

    For now AMD is superior, because a server reboot requires about 1/100th of the time that it takes an Intel CPU farm to get back up due to horrible BIOSes. The more motherboards you have, the longer it takes due to serialized bootup. Ouch... Massive ouch...

    Downtime versus marginable CPU speed... And less cores...

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