Lucas123 writes "According to a report from a Japanese news agency, semi-conductor leaders Intel, Samsung and Toshiba are forming a development alliance to halve the size of chip circuitry in order to create more dense NAND flash chips and more powerful processors. The vendors would not confirm the news report, but the Nikkei Daily said they hope to reduce lithography technology from the 20 nanometer size used today to something below 10nm. The news agency also said Japan's Ministry of Economy, Trade and Industry may fund up to half the project's cost, or roughly $61 million."
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