Tilera To Release 100-Core Processor 191
angry tapir writes "Tilera has announced new general-purpose CPUs, including a 100-core chip. The two-year-old startup's Tile-GX series of chips are targeted at servers and appliances that execute Web-related functions such as indexing, Web search and video search. The Gx100 100-core chip will draw close to 55 watts of power at maximum performance."
Awfully generous with the term "core" (Score:2, Insightful)
Yes, I suppose technically any FPGA could be considered a "core" in its own right, but it's a far cry from the CPU cores that you typically associate with the term.
Putting a stock on a semi-automatic rifle makes it an "assault weapon", but c'mon. It's still a pea shooter.
Custom ISA? (Score:5, Insightful)
Re:This is great ! (Score:5, Insightful)
By the way I just typed "make menuconfig" and it wiil let you enter a number up to 512 in the "Maximum number of CPUs" field, so the Linux kernel seems ready for up to 512 CPUs (or cores, they are handled the same way by Linux it seems) as far I can tell by this simple test. Entering a number greater than 512 gives the "You have made an invalid entry" message
Whoa. If you change the source a little, you can enter 1000000 into the Maximum number of CPUs field! Linux is ready for up to a million cores.
If you change the code a little more, when I enter a number that's too high for menuconfig, it says "We're not talking about your penis size, Holmes"
100? (Score:3, Insightful)
Wouldn't it have been better to make it a power of 2? Some work is more easily divided when you can just keep halving it. 64 or 128 would have been more logical I would have thought. I'm not an SMP programmer thought, so perhaps it doesn't make any difference.
Re:obligatory (Score:3, Insightful)
It IS a Beowulf cluster.
Obligatory Princess Bride quote:
Miracle Max: Go away or I'll call the brute squad!
Fezzik: I'm ON the brute squad.
Miracle Max: [opens door] You ARE the brute squad!
Re:Custom ISA? (Score:4, Insightful)
1. LLVM backend
2. Grand central
3. ???
4. Done.
Seriously though, this is exactly what Apple have been working towards recently in the compiler space. You write your application and explicitly break up the algorythm into little tasks that can be executed in parallel. Using a syntax that is light weight and expressive. Then your compiler tool chain and runtime JIT manages the runtime threads and determines which processor is best equipped to run each task. It might run on the normal CPU, or it might run on the graphics card.
Re:This is great ! (Score:3, Insightful)
Actually, some algorithms (like fluid simulation and a very large neural net) are not that hard to parallelize to run on a million cores.
Re:This is great ! (Score:3, Insightful)
Actually, some algorithms (like fluid simulation and a very large neural net) are not that hard to parallelize to run on a million cores.
Building the memory backplane and communication system (assuming you're going for a cluster) to support a million CPUs is non-trivial. Without those, you'll go faster with fewer CPUs. That's why supercomputers are expensive (it's not in the processors, but in the rest of the infrastructure to support them).
It would be clever (Score:3, Insightful)
Since a) developing a processor is insanely expensive and b) they need it to run lots of software ASAP, it would be very clever if they spent a marginal part of the overall development costs in making sure every key Linux and *BSD kernel developer gets some hardware they can use to port the stuff over. Make it a nice desktop workstation with cool graphics and it will happen even faster.
They are going up against Intel... The traditional approach (delivering a faster processor with a better power consumption at a lower price) simply will not work here.
I think Movidis taught us a lesson a couple years back. Users will not move away from x86 for anything less than a spectacular improvement. Even the Niagara SPARC servers are a hard sell these days...
Re:This is great ! (Score:5, Insightful)
Re:15-bladed shaving razor (Score:3, Insightful)
Yes, indeed. The memory bus is usually the bottleneck here... unless you switch from SMP to NUMA architecture, which seems necessary for anything with more than, say, 8 to 16 cores.