Intel's Roadmap Includes 4nm Fab in 2022 259
Precision submits "Intel Corp., the largest maker of chips in the world, has outlined plans to make chips using 4nm process technology in about thirteen years. According to Intel, integration capacity of chips will increase much higher compared to fabrication process."
Logical next step: (Score:5, Funny)
Re:Logical next step: (Score:5, Funny)
Either that or the "TARDIS" chip. The logic gates are bigger on the inside than on the outside in order to get around moore's law.....
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That would never get you around Moore's Law, but it might get you around the very existence of Moore himself ;-)
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Re:Logical next step: (Score:5, Funny)
They can already do this using, my special negative-sized ruler.
The one you use to measure your penis?
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hedwards is a GeekGirl? That's hot!
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They can already do this using, my special negative-sized ruler.
The one you use to measure your penis?
No, that's the Complex ruler you're thinking of. How else can he measure "J"?
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My business plan includes world domination (Score:5, Insightful)
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They are still valuable, and something to consider, but still very much a "projection" and not a "concrete plan with funding".
And you know this HOW?
Are you privilege to Intel internal budget and development cycles?
I see no reason this gets your vote for fairy-tale status. The shrinkage from 65nm to to 45nm was achieved about 18 months after the first mass produced 64nm processors hit the market.
Whether this is actually doable in practice remains to be seen.
A crystal of bulk silicon has a lattice constant of 0.543 nm, so such transistors are on the order of 100 atoms across in a 64nm chip.
Cutting that down to 2nm starts to run per
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True that.
For similar giggles, try reading a Wired magazine from ten years ago...
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Re:My business plan includes world domination (Score:5, Interesting)
Actually, I have been privy to Intel planning for many years, as I used to work there. It takes many years to develop the next generation uP. That means that the 16 nm devices are already in initial design stages. Since the overall design process is such a big job, all the supporting hardware is a major part of the design process. Like the fab hardware. So, no, much of this roadmap is not a thought experiment, but already many projects with many members working on the pieces. Otherwise, the plan would never come together when its time has arrived.
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True to a degree, though there is definitely money going towards working out the broad details of such a plan.
While many industries don't create plans that span more than a year or two, the business Intel is in all but requires it. It's absolutely a work in progress and is expected to change over the years but you'd be surprised how accurate these things can be. The broader vision of the Nehalem we see today is not that far removed from the vision of Nehalem they were discussing ~6 years ago.
The people that created this must not be engineers (Score:3, Insightful)
Re:The people that created this must not be engine (Score:4, Informative)
Just sayin'. Your product management/marketing folks at these firms are often very plugged in to the tech side of things (I should know, being one of them).
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Or so you think! ^^
After all there's a reason you're not actually working in enginerring, when you're such a great engineer...
Re:The people that created this must not be engine (Score:5, Insightful)
"After all there's a reason you're not actually working in enginerring, when you're such a great engineer..."
Yeah - the pay is better.
Re:The people that created this must not be engine (Score:5, Informative)
Forget about the limitations of die shrink, what about the limitations of quantum mechanics? I was under the impression that 4 nm is getting awefully close to the point where quantum tunneling makes tansistors unworkable. As in, when you detect a signal, you can't tell if it's there because it should be or because an electron just jumped the gap.
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They likely have more knowledge surrounding technology for a decade plus roadmap than you do.
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Funny is how everything changes after 2012, they will have a different type of transistors. Maybe the guy really thinks things won't matter after 2012 - nut-case.
Just in case, I ask you to hold them to their other words too:
http://www.design-reuse.com/news/4850/intel-building-blocks-10-ghz-processors.html [design-reuse.com]
Next year we are going to see 10GHz processors, this is going to be an interesting exercise.
Maybe Tom's Hardware or some other brave soul will manage.
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most of us (me included) are former engineers who moved to marketing because we could make significantly more money there, have a nicer office,
Not at Intel (the subject of this article). Everyone there gets a cubicle, even the CEO. The executives have slightly nicer and larger cubicles, but that's it. Marketing peons like yourself would get the same 9x9 cubicle the engineers get.
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Yikes!
Would a real engineer trade the joy of building useful things for the benefits you mention? Some of the qualities you mention are desirable for any job and everyone should strive for (e.g. good social skills) but most of your post came off sounding very vain to me. I don't care how much I could make in marketing, I'm not going to switch.
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Must we dumb it down? (Score:4, Funny)
"Intel Corp., the largest maker of chips in the world,
Is it really neccesary to explain who intel is on /.? I think even my parents know that intel makes chips, they put out enough commercials... Are even our taco overlords not really reading TFS before hitting that submit button?
And what are they planning to use as a mask (Score:2, Flamebait)
... besides wishful thinking?
Oh, and given at those dimensions quantum noise (e^KT/q) will be greater in signal strength than a 1 or 0 level I am interested to see just how this works.
I'd love to see it but for the moment it's just numbers on a slide. About a gazzilion dollars in research are needed to get to those dimensions.
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Well, all you need to do is reduce the value of K...
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I'd love to see it but for the moment it's just numbers on a slide. About a gazzilion dollars in research are needed to get to those dimensions.
I don't pretend to be able to meaningfully comment on how likely they are to make it, but that is a fair description of Intel's business model over the last 30 years.
Maybe they'll use ultra-low temperature (Score:2)
A lot of the troubles that look like fundamental roadblocks (like e^KT/q) become less of an issue at low temperature: quantum tunneling, resistivity, and smallest noticeable voltage change to name a few.
Let me speculate: say we lived in an era where you could run a medium-thick client with hardware like what we have today, but have a fast Internet link to a datacenter with 4 nm chips designed to work at 20 K or cooler. These chips could use much lower voltages and currents, and could have fewer tunneling p
My Roadmap (Score:5, Funny)
Re:My Roadmap (Score:5, Insightful)
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The liability from lawsuits by people who sue after getting hit in the head by heavy gold flying pony crap will bankrupt you
Just pass that liability on to someone else. For instance, you could put it in their employment contract that any damages from law suits will be paid by garnishing the pooper scoopers' wages.
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for $943.00 for 10oz of pure gold you can buy your own air space.
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It will be the 20s. You better be wearing a zoot suit when you ride that pony.
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Well, that is physically feasible. I just have a feeling that you you didn't mean a pony in a ultralight plane, that got his ass stuffed with balls of gold... ;)
Although you could certainly get someone to sell you that.
12 years seems ambitious (Score:3, Insightful)
String theory (Score:2, Funny)
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Already taken: IEEE 802.11s [wikipedia.org].
IEEE 802.11s defines a mesh-networking protocol which "extends the IEEE 802.11 MAC standard by defining an architecture and protocol that support both broadcast/multicast and unicast delivery using 'radio-aware metrics over self-configuring multi-hop topologies.'"
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Scientists will NEVER find the g-string.
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Kidding aside, parts of String Theory have already been disproven by some new experiment looking for gravity waves. I believe there was a Slashdot article about it a few days ago.
Oh Intel. Such optimists... (Score:5, Funny)
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What's to stop you from carving them out of the bone of those rat-men? Are they boneless? ;)
Or are they actually your children by then?
Who can predict that far out? (Score:4, Insightful)
I would suspect that unforeseen developments, such as big advances in 3d circuit design, would alter this schedule a lot. This is simply daydreaming.
Re:Who can predict that far out? (Score:5, Insightful)
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3D chip layouts are part of this roadmap. This kind of roadmap isn't really intended to say what their process will be, however. It's intended to give numbers to their core design teams about how many transistors they will be able to play with, what the latencies will be, and so on.
I'm unconvinced - the latency characteristics of a 3D architecture are going to be vastly different to those you'll find on any 2D chip, no matter how small you make the features.
That said, I'm assuming Intel is basing this roadmap on some data with at least _some_ substance, rather than just blindly assuming we can keep pushing Moore's law out forever. I'd be interested to know how much of this is based on existing research and how much is BS.
If they go badly wrong, you get something like the Pentium 4.
So I'm going to need a bigger nuclear reactor in my laptop then
Power vs Speed (Score:4, Interesting)
It seems to me that rather than the identity and timeframe for the different technology nodes (which anyone who knows Moore's law could have given in advance) the interesting thing from that slide is what it says about delay scaling and energy scaling. Whenever you shrink your process you have a certain amount of gain that can go into either making the chip faster or making the chip more power efficient. For a long time back in the day people wanted to stay at 5 volts to preserve compatibility, so everyone just kept putting it into going faster. Nowadays chipmakers try to go for a more balanced strategy.
But here, on this chart, Intel is saying that they're going to a delay scaling of "~1", staying at pretty much the same speed. And they're looking to increase their energy scaling from "~.5" to ">.5". So it looks like we really have topped out in terms of GHz.
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For a long time back in the day people wanted to stay at 5 volts to preserve compatibility, so everyone just kept putting it into going faster.
I don't think preserving compatibility had much to do with concentrating on making things go faster. If you wanted to make a low voltage chip that was compatible with 5v power and TTL data then that would be fairly trivial (onboard voltage regulator and some TTL switching at the edges). The simple fact is that for a long time there was pretty much no need for trying to make things consume less power - no one cared about power consumption. Eventually we got to a point where we *had* to care about power co
How accurate are Intel roadmaps? (Score:2)
I don't really pay too much attention to the chip business, so I'm wondering how well, historically, Intel has followed their roadmaps? Are they like an actual roadmap of a, uh, road, that you can follow, or more like a "Roadmap to Peace" that's made because it looks good and people expect you to, even though everyone knows it's not going to work out?
Anyone got a roadmap from 1996 or so, so one can see how well it was followed?
How about 1994, 1997 and 2000/2001? (Score:5, Interesting)
Here's [aeiveos.com] a set of roadmaps generated at three-year intervals. Note that, with the exception of RAM density, each of the charted criteria outran the roadmaps' predictions.
These roadmaps are generated by a consortium of companies. They're routinely betting the future of their entire industry on these roadmaps. They're actually pretty darned conservative.
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Hmmm. My reading of this is that they total blew the clock cycle predictions as well.
C//
Re:How about 1994, 1997 and 2000/2001? (Score:4, Insightful)
of course they did (Score:2)
of course intel showed "plans" for this. they have investors who don't understand the limits of miniaturization to snow.
And on a personal note... (Score:3, Funny)
That's great. Planning for the future must truly be what separates man from beast. I do the same thing. Here's my personal roadmap:
2010) - Get in shape, including 6-pack, benchpressing twice my weight and being able to do a Triathlon in Olympic-qualifying time.
2011) - Win Powerball. Quit job
2012) - Use lottery winnings to build self-sufficient compound to survive Mayan apocalypse.
2013) - Now that I'm the only one in the world with means of survival, all the girls will like me. Procreate wildly to start new human race.
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Or maybe
2014) Run out of lottery money on alimony payments
Semiconductor roadmap (Score:5, Informative)
There have been formal semiconductor roadmaps to the future since 1992. There's an consensus roadmap [itrs.net] updated annually by an industry group.
This isn't a blue-sky thing. It tells all the players what they need to do to keep up their part of the technology. The fab-equipment people, the device physics people, the etching people, the mask people, the substrate people, the design tools people, etc. all have to push their parts forward. The roadmap tells them how far each piece has to be pushed.
These roadmaps are available for past years, and you can see how the industry has tracked the roadmap. It's reasonably close for any five year period. The big change in the last decade is that heat dissipation is starting to dominate the problem. The roadmap now focuses on memory devices, which have low activity per cell compared to compute elements and aren't yet power-limited.
The current consensus is that the improvements to known technology can get down to 22nm, and then it gets hard. The roadmap assumes CMOS transistors; other devices are discussed, but aren't factored into the mainline predictions.
"compared to fabrication process" (Score:2)
In other words: "we can imagine much more than we can actually produce in this physical reality".
Re:Must not be using silicon then... (Score:4, Informative)
They're looking at moving away from using silicon as a substrate. I can't remember if artificial diamond or something else is the proposed replacement.
Re:Must not be using silicon then... (Score:5, Funny)
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You are correct, they plan to transition from silicon to unobtainium.
Which they will get from Pandora?
(cross threads with he Avatar movie article)
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No. The best source of unobtainium is a wild MissingNo.
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You are correct, they plan to transition from silicon to unobtainium.
No, probably Gallium arsenide (GaAs).
http://en.wikipedia.org/wiki/Gallium_arsenide [wikipedia.org]
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huh?
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Re:Must not be using silicon then... (Score:4, Funny)
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It's not the radius that matters!!! (Score:5, Informative)
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Carbon has a van der Waals radius of 170pm, and covalent radii of around 70pm, compared to Silicon's 210 and 111pm. So it's smaller, but not orders of magnitude so. Seems to me they're still going to hit a brick wall sooner or later if they try to keep shrinking feature size. And I doubt they're going to figure out how to use Hydrogen as a substrate.
And honestly, I don't know where the impetus for ever-smaller and ever-faster chips is coming from. No one really cares about how fast their computer is, un
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Um, for those building supercomputers?
Today, supercomputers are not solely the purvue of RISC chips (which could also use this technology with proper patent-licensing fees paid), but also often made of commodity hardware, such as that coming from Intel. See: Google. With the sheer volume of data to mine that we have today, and the accelerated growth of data warehouses and other VLDBs (not just multi-TB, but multi-PB), faster everything is important in order to turn that data into value (sorry - that's alr
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No need to use hydrogen, which, BTW, doesn't really exist as a solid, at reasonable temperatures.
Yeah, I was kidding with that. My point is, it seems like we're not talking about anything that's orders of magnitude better than Silicon. Before too long, if they keep shrinking things at this rate, they're going to hit a brick wall, right? They can only go so small with Silicon, and then if they switch to Graphene, they can get features a little smaller, but then they'll run up against the limits there, and
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Re:Must not be using silicon then... (Score:5, Informative)
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or 2.44e-10 cubits [Egyptian]
Re:Must not be using silicon then... (Score:5, Funny)
Or...
Google claims that it's about 0.022 beard-seconds. [google.com]
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Not quite. The atomic radius for silicon is 111 pm [wikipedia.org], so 4 nm is a little over 36 silicon atoms wide.
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The atomic radius of Si is 111pm, or ~0.1 nm.
It's still a bit hard to believe that they can create logic gates 18 times the diameter of a silicon atom—and only 7.5 times the atomic lattice spacing in silicon crystal. Time will tell.
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It's still a bit hard to believe that they can create logic gates 18 times the diameter of a silicon atom
IIRC process sizes are the size of the smallest feature (typically the mosfet gate length), not the size of a complete gate.
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http://en.wikipedia.org/wiki/16_nanometer [wikipedia.org]
http://en.wikipedia.org/wiki/11_nanometer [wikipedia.org]
If you read the two articles, it's clear that there are significant issues with gate sizes, materials, and quantum tunneling that make even 11nm basically a pipe-dream. It's the same reason we don't see 10ghz processors - they've hit limits that current science can't easily get past.
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The resulting nanostructures might be used as scaffolds or as miniature circuit boards for precisely assembling components like carbon nanotubes and nanowires. Such circuits would be much smaller than those possible using conventional techniques to fabricate semiconductors. Indeed, the resolution of the process is roughly 10x higher than those currently used to make computer chips because the spacing between the components can be as small as just 6 nm, explains Rothemund.
Source: http://physicsworld.com/cws/article/news/40171 [physicsworld.com]
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You got to give it to the Eruos for using "," instead of "." for a decimal point.
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And seems to have largely gone out of fasion. Mostly we brits use the period these days like the americans do.
Decimal commas are annoying and confusing. Particularlly when some idiot manufacturer neglects to change them when making the english version of their documention.
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what is 1,234? One thousand two hundred and thirty four, or one and two hundred and thirty four thousandths? Mixing the styles is certainly ambiguous at best unless you *always* include tenths in your numbers.
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I have a similar problem. The tagging interface works perfectly for me in every way ... except that not a single tag I have ever set h
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They program in perl. They are ABOVE common sense.
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I get the same thing and I'm even unable to meta-moderate because of the same issue.
Slashdot, getting more broken every day.
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I'm not an RF expert; but I'm going to hazard the guess that pushing 30+gigabytes a second over the air, even across short distances, is not something you do to make your life easy.
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When you think about all the interference problems, a wireless connection (even a very short-range one, like 1 cm) is just dumb.
When we get to the point that electrical signal interconnects between chips are a problem, the most likely next step is optical interconnects.
Amateurs can already build hardware with modern chips, but there's rarely a good reason for an amateur to work with BGA chips. When working with those, it usually makes a lot more sense to just buy ready-made boards with those chips. For e
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Says the guy who has nothing to do with actually developing these processors.
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