Happy Birthday! X86 Turns 30 Years Old 362
javipas writes "On June 8th, 1978 Intel introduced its first 16-bit microprocessor, the 8086. Intel used then "the dawn of a new era" slogan, and they probably didn't know how certain they were. Thirty years later we've seen the evolution of PC architectures based on the x86 instruction set that has been the core of Intel, AMD or VIA processors. Legendary chips such as Intel 80386, 80486, Pentium and AMD Athlon have a great debt to that original processor, and as recently was pointed out on Slashdot, x86 evolution still leads the revolution. Happy birthday and long live x86."
Intel's anniversary too (Score:5, Funny)
Nice self-reference double entendre Taco!
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Sure beats being under the hill.
Might want to check your FPU (Score:5, Funny)
Re:Might want to check your FPU (Score:5, Funny)
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Brilliant neologism - I salute you :P
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Although I don't think I invented confuddling (confuzzling is another good variation), and it was my sister who invented jahookin'
Re:Might want to check your FPU (Score:5, Funny)
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Oh wait, did I say a few?
Re:Might want to check your FPU (Score:5, Funny)
How Long? (Score:5, Interesting)
Re:How Long? (Score:5, Interesting)
Intel made some horrible design decisions. (Score:5, Insightful)
On that day, he was very sad. Intel made some horrible design decisions. We've had to live with them every since. Starting with the fact that assembly language programming for the X86 architecture is really annoying.
And so did IBM with the PC (Score:5, Interesting)
TFA doesn't get into the real reason that the x86 took off, that the BIOS for the IBM PC was cloned at least two or three times which allowed for much cheaper hardware (the original Compaq and IBM 486 machines were going for close to 10K$, where 486 whiteboxes were available a few months late for 2K$).
8086 computers? (Score:2)
I think you mean 8086 computers, or even 8008 computers.
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Perhaps you meant 8088?
I mentioned the 486 specifically because low cost 486 machines were available only a few months after the expensive models from the big boys - the first low cost clone of the 8088 came out several years after the PC.
Re:How Long? (Score:5, Interesting)
The problem is as usual MSFT. which only runs on windows. yes I know a decade ago NT 4.0 did run on PowerPC, and even a couple of alpha chips.
Apple with a fraction a of the software guys can keep their OS on two major different style of chips PowerPC, and Intel x86, along with 32bit and 64 bit versions of both. Sun keeps how many versions of Solaris?
Nope but Vista only runs on x86. So X86 will remain around as long as it does.
Re:How Long? (Score:4, Funny)
Re:How Long? (Score:5, Funny)
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I have little doubt that Intel could force a change on servers and corporate desktops, and Linux, BSD and Solaris, as well as Apple, would be able to adjust within a very short period of time to run on it.
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Linux can just recompile them and Apple only supports hardware they distribute, so that makes it easier.
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The biggest problem is probably like with 64-bit Windows: drivers.
No, the biggest problem is applications . Same "problem" that stops people switching from Windows to $OS_DU_JOUR.
The second biggest problem, of course, is basic economics. What other hardware platform offers even the slightest amount of ROI for Microsoft to expend the effort on porting Windows to ? Where's the business case ?
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The problem is NOT Microsft.
The problem is end users. They want to use their existing x86 hardware and software. They aren't really interested in not having drivers for anything more than 3 months old, and running all their existing software at 30-70% its current speed.
Look at the x64 versions of Windows. It highlights exactly the problem. XP x64 was crippled by lack of drivers, and Microsoft HAD to force the issue with Vista because the x86 ram limit was starting to hold things
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Re:How Long? (Score:5, Interesting)
But wait, that's exactly what x86 is. In terms of code density it does pretty well compared to Risc. Modern x86s don't implement it internally, they translate it to Riscy uops on the fly and execute those. And over the years compilers have learned to prefer the x86 instructions that are fast in this sort of implementation. And, thanks to AMD it now supports 64 bit natively in its x64 variant. This is important. 64 bit maybe overkill today, but most architectures die because of a lack of address space (see Computer Architecture by Hennessy and Patterson [amazon.com]). But 64 bit address spaces will keep x86/x64 going for at least a while.
http://cache-www.intel.com/cd/00/00/01/79/17969_codeclean_r02.pdf [intel.com]
If you know that the variable does not need to be pointer polymorphic (scale with the architecture), use the following guideline to see if it can be typed as 32-bit instead of 64-bit. (This guideline is based on a data expansion model of 1.5 bits per year over 10 years.)
IIRC 1.5 bits per year address space bloat is from Hennessy and Patterson.
At this point we have 30 unused bits of address space, assuming current apps need 32GB tops. That gives 64 bit x64 another 20 years lifetime!
Re:How Long? (Score:5, Interesting)
Many of the shortest opcodes on modern Intel CPUs are for instructions that are never used. Compare this with ARM, where the 16-bit thumb code is used in a lot of small programs and libraries and there are well-defined calling conventions for interfacing 32-bit and 16-bit code in the same program.
Modern (Core 2 and later) Intel chips do not just split the ops into simpler ones, they also combine the simpler ones into more complex ones. This was what killed a lot of the original RISC archs - that CISC multi-cycle ops became CISC single-cycle ops while compilers for RISC instructions were still generating multiple instructions. On ARM, this isn't needed because the instruction set isn't quite so brain-dead. ARM also has much better handling of conditionals (try benchmarking the cost of a branch on x86 - you'll be surprised at how expensive it is), since conditionals are handled by select-style operations (every instruction is conditional) and which reduces branch penalties and scales much better to superscalar architectures without the cost of huge register files.
Re:How Long? (Score:5, Informative)
IIRC 1.5 bits per year address space bloat is from Hennessy and Patterson. [...] At this point we have 30 unused bits of address space, assuming current apps need 32GB tops. That gives 64 bit x64 another 20 years lifetime!
Empirically, it hasn't been growing at anywhere near that rate. Ca. 1980 my TRS-80 had a 16-bit address space, and had enough memory to exhaust all of the addresses. Today, I'm using computers that have 1 Gb of memory, which is 30 bits worth of address space. That's less than 0.5 bits per year.
Also, in order to keep the actual used address space growing at a constant number of bits per year, Moore's law would have to continue indefinitely. But most experts are saying it will probably stop in 10 to 30 years. If we keep growing at 0.5 bits per year, starting now at 30 bits, and stop growing at the Moore's law rate in 2038, then we'll only be using 45 bits worth of actual address space.
It's hard to grok how big a 64-bit address space would really be. As a reality check, let's say that I want to own every movie that's ever been listed on IMDB, and store every single one of those in my computer's RAM simultaneously. If each one takes as much storage as a 5 Gb DVD, and IMDB has 400,000 movies listed [imdb.com], then that's a total of 2x10^15 bytes, which is 50 bits. That's 16,000 times smaller than a 64-bit address space.
As another example, the human brain has about 10^11 neurons. Each of those may be connected to 10^4 other neurons, so the total number of connections is about 10^15. That suggests that the total amount of RAM needed for direct, brute-force modeling of a human brain (assuming we knew enough to program such a model, which we don't, and had parallel processors that could run such a simulation, which we don't) might be about 10^15 bytes, which is a 50-bit address space. A 64-bit address space is 16,000 times bigger than that.
I think we're likely to see flying cars, Turing-level AI, and vacations on the moon before we need 128-bit pointers.
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I'd also suggest that the state variables to describe each neuron and synaptic connection would be fairly complex, so the 16,000 times bigger probably shrinks quite a bit (hint - 1,000 separate connections per neuron can't be efficiently represented in less than 1,000 bits - and if we need FP accuracy, we're talking 32Kb / neuron).
Give me 128 bit pointers, or give me death!
math fail (Score:5, Informative)
Each of those may be connected to 10^4 other neurons, so the total number of connections is about 10^15.
You're counting a lot of connections more than once (see permutations), not to mention your perilous assumption that a neural connection would only consume one byte in the hypothetical model.
If each one takes as much storage as a 5 Gb DVD, and IMDB has 400,000 movies listed [imdb.com], then that's a total of 2x10^15 bytes, which is 50 bits. That's 16,000 times smaller than a 64-bit address space.
Firstly, what you mean is GB(bytes) not Gb(bits). 2e15 bytes would need a 51-bit address space, and 16 exabytes is a little over 9223 times 2e15 bytes.
I like the direction of your ideas though.
Re:How Long? (Score:5, Interesting)
128-bit linear addressing is not so useful, but you can introduce structure into the address so that (for example) the first 64 bits is a network address and the second 64 bits is the address of storage at that network address. This requires distributing the functionality of the MMU across various network elements, but is not especially novel, and from a software perspective is a special case of NUMA. (The special case lends itself to some clever scheduling based on the delay hints available in a further structured network address, especially if you generally organize things such that the XOR of two network addresses is a useful (if not perfect) delay metric from the perspective of an accessor).
This can even be done "in the small" on a non-networked host by allocating "network addresses" in the top 64 bits to local random access storage. You could look at this as a form of segmented memory (MULTICS style) or as an automatic handling of open(2)+mmap(2) based on (for example) a 64 bit encoding of a path name in the MSBs of the addresses. That is, dereferencing computer memory address 0xDEADBEEF00000001 automatically opens and mmaps a file corresponding to 0xDEADBEEF.
The opportunities to abstract away networked file systems without losing (or even while gaining) useful information about objects' characteristics (proximity, responsiveness, staleness) suggests that the address size used at the level of a primitive ISA that uses pseudo-flat addressing is mainly limited by the overhead of hauling around extra bytes per memory access. Pseudo-flat addressing can also in principle steal ideas from X86's various addressing models for dealing with addresses of different lengths.
Ultimately, the difficulty is in the directory problem. That does not go away even if you use radically different "addresses" for objects -- directories are already a pain if you use URLs/URIs for example, or if you use POSIX style filenames, or whatever, and the problem worsens when you have different "addresses" for the same logical object.
(Fun is when you have to figure out race conditions involving a structured set of bytes that is in a file shared out by AFP, SMB, NFS, and WebDAV, as well as being in use locally, with client software responsible for choosing the most appropriate available access method since there is no guarantee that any one of these methods will work for all clients at all times).
One possible approach to this is to insist that any reachable object is a persistent object, with a permanent universal name. If you have the permanent universal name, the object is either available to you or errors out. If you do not have the permanent universal name, you are out of luck unless you have a "locator" that points to it (or points to something that points to something that
[cf Church encoding, Morgensen-Scott encoding and normalization in the computer science sense]
Re:How Long? (Score:5, Insightful)
maybe that will finally be enough to run vista at a decent speed.
[/bashing joke]
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I'd have to defrag mine first, though :P
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Re:How Long? (Score:5, Insightful)
The question is whether a processor running its native instruction set would be faster. From what I can tell the native instruction format of a modern x86 is wider than the x86 equivalent. Suppose the uops in the pipeline are 48 bit - a 32 bit constant and a 16 bit instruction. That is quite a bit larger than a typical x86 instruction. Wider instructions take more space in Ram and cache. You don't need to decode them, but the extra time fetching them kills the advantage.
And what is native is very implementation dependent. An AMD chip will have a very different uop format from an Intel one. Actually even between chip generations the uop format might change. Essentially Risc chips tried to make the internal pipeline format the ISA. But in the long run that wasn't good. Original Risc had branch delay slots and later superscalar implementations where branch delays work very differently had to emulate the old behaviour because it was no longer at all native. So if you did this you'd get an advantage for one generation but later generations would be progressively disadvantaged. Or you could keep switching instruction sets. But if most software is distributed as binaries that is impossible.
I wish it would just die. (Score:2, Insightful)
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But you see, the thing with standards is that the longer they live, the harder they are to kill. At 30 years old, the x86 ISA is damn near invincible now.
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Doing it right -- mostly (Score:5, Interesting)
The other big success is their constant work on making the entire system architecture better, and basically giving that work to the industry for free. PCI - USB - AGP - all directly driven by Intel.
Its a bizarro place to work but my time their was not wasted
Re:Doing it right -- mostly (Score:5, Insightful)
While I'm sure thats how the script was repeated in Intel, suggesting great generosity ("And we give it away for free!"), what choice did they really have? IBM's whole Micro Channel Architecture fiasco showed what licensing did to adoption of new advances in system architecture and integration.
Re:Doing it right -- mostly (Score:5, Interesting)
Congrats on working at Intel for 16 years. Might I suggest that you document this period of activity into a small book? It would be great for the historical record.
Typing is a real pain. I suggest using the speech-to-text feature found buried in newer versions of MS Word or the IBM or Dragon speech programs. Train the system by reading a few chapters off the screen. Then sit back and talk about the Intel years, the projects, the personalities, the cubicals, the picnics, the parking lot, the haircuts, the water cooler stories, anything and everything. Don't worry about punctuation and paragraphing, which can be awkward when using speech-to-text systems. It's important to get a text file of recollections from the people who were there. Intel was 'ground zero' for the digital revolution that transformed the world in the last quarter of the 20th century. In fifty to a hundred years from now, people will want to know what it was really like.
Thank you.
A few tweaks, and... (Score:5, Interesting)
The paragraph size of the 8086 was 16 bytes; that is, the segment registers were essentially multiplied by 16, giving an address range of 1MB, which resulted in extreme memory pressure (that 640K limit) starting in the mid 80s.
If the paragraph size had been 256 bytes, that would have resulted in a 24MB address space. We probably wouldn't have hit the wall for another several years. Companies such as VisiCorp might have succeeded at products like VisiOn, which were bending heaven and earth to cram their products into 640K, it would have been much easier to do graphics-oriented processing (death of Microsoft and Apple, anyone?). And so on.
Things might look profoundly different now, if only the 8086 had had four more address pins, and someone at Intel hadn't thought, "Well, 1MB is enough for anyone..."
Re:A few tweaks, and... (Score:5, Insightful)
Re:A few tweaks, and... (Score:5, Insightful)
But would the extra RAM have been affordable to typical users of these programs at that time?
I remember fighting for expensive upgrades from 4 to 8 MB RAM at my workplace back in the early 90's. At that time PCs had already been able to use more than 1 MB for some years. So the problem you are referring to must have been years earlier where an upgrade from 1 to 2MB might probably have been equally expensive.
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Anyway, you're giving me bad flash-backs to EMS and XMS and himem and other things best forgotten.
Itanium sank (Score:2)
How could Intel have got it so wrong? as Linus said "they threw out all of the good bits of X86".
It's good to see however that Intel have now managed to product decent processors now the GHz wars are over. In fact it's been as much about who can produce the lowest power CPU. AMD seem to just have the edge.
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Re:Itanium sank (Score:5, Insightful)
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That's what they do best. Getting it wrong.
x86 segments (we'll make it work like Pascal). Until they gave up on the 64k segments it was excruciating.
iApx432
i860
IA64
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Lets not forget the wonderful Itanium processor which was supposed to replace X86 and be the next gen 64-bit king.
How could Intel have got it so wrong? as Linus said "they threw out all of the good bits of X86".
It's good to see however that Intel have now managed to product decent processors now the GHz wars are over. In fact it's been as much about who can produce the lowest power CPU. AMD seem to just have the edge.
Not just Itanium. All the x86 alternatives have sunk over the years. Mips, Alpha, PPC. x86 was originally a hack on 8080, designed to last for a few years. All the others had visions of 25 year lifetimes. But the odd thing is that a hack will be cheaper and reach the market faster. An architecture designed to last for 25 years by definition must include features which are baggage when it is released. x86, USB, Dos and Windows show that it's better to optimize something for when it is released. Sure doing t
Re:Itanium sank (Score:5, Insightful)
Back in the 80's it was a lot cheaper to develop a processor. They were considerably simpler and slower. The reason there were so many processor architectures around back them was that it was feasible for a small team to develop a processor from scratch. It was even possible for a small team to build, out of discrete components, a processor that was (significantly) faster than a fully integrated microprocessor, e.g. the Cray-1.
As the semiconductor processes improved and more, faster, transistors could get squeezed onto a chip, the complexity and the speed of microprocessors increased. Where you're at today is that it takes a billion dollar fab and a huge design team to create a competitive microprocessor. x86 has succeeded because there is such a torrent of money flowing into Intel from x86 sales that it is able to build those fabs and fund those design teams.
PowerPC, for example, was a much smaller effort than Intel back in the mid-90's. PowerPC was able, for a short time, to significantly outperform Intel and remained fairly competitive for quite a while even though the design team was much smaller and the semiconductor process was not as sophisticated as Intel's. The reason for that was that the architecture was much better designed than Intel, making it easier to get more performance for fewer $$. Eventually, however, the huge amount of $$ going into x86 allowed Intel to pull ahead.
Re:Itanium sank (Score:5, Interesting)
Overcoming Limitations (Score:3, Interesting)
Re:Overcoming Limitations (Score:5, Insightful)
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Kinda makes you wonder how different things might be or how much farther things might've come had a better architecture become the de facto standard of commodity hardware.
I've heard it said that most of the processing of x86 architectures goes to breaking down complex instructions to two or three smaller instructions. That's a lot of overhead over time. Even if programmers broke down the instructions themselves so that they were only using basically a RISC-subset of the x86 instructions, there's all that hardware that still has to be there for legacy and to preserve compatibility with the standard.
But I'm not a chip engineer, so my understanding may be fundamentally flawed somehow.
I think the important thing to remember is that total chip transistor counts - mostly used for caches - have inflated very rapidly due to Moores Law. And legacy baggage has grown more slowly. So the x86 compatibility overhead in a modern x86 compatible chip is lower than it was in a 486 for example. Meanwhile the cost of not being x86 compatible has stayed the same. Arm cores are much smaller than x86 for example but most PC like devices still use x86 because most applications and OSs are distributed as x8
Happy 29.9999999876547542 (Score:5, Funny)
your great-great-great grandson,
Pentium
Happy Birthday (Score:5, Funny)
message db "Happy Birthday!", "$"
main proc
mov ax,seg message
mov ds,ax
mov ah,09
lea dx,message
int 21h
mov ax,4c00h
int 21h
main endp
end main
The scary thing is (Score:4, Interesting)
not fair, this is too Do$$y (Score:5, Funny)
Intel has always been a P.O.S. (Score:4, Insightful)
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Re: Intel has always been a P.O.S. (Score:2)
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Happy Happy Birthday (Score:4, Funny)
makes you wonder .. (Score:2)
Die already ! (Score:5, Insightful)
Oh my god, no ! Die already ! The design is bad, the instruction set is dumb, too much legacy stuff from 1978 still around and making CPUs costly, too complex and slow. Anyone who's written assembler code for x86 and other 32-bit CPUs will surely agree that the x86 is just ugly.
Even Intel didn't want it to live that long. The 8086 was hack, a beefed up 8085 (8-bit, a better 8080) and they wanted to replace it with a better design, but iAPX 432 [wikipedia.org] turned out to be a desaster.
The attempts to improve the design with 80286 and 80386 were not very successful... they merely did the same shit to the 8086 that the 8086 already did to the 8085: double the register size, this time adding a prefix "E" instead of the suffix "X". Oh, and they added the protected mode... which is nice, but looks like a hack compared to other processors, IMHO.
And here we are: we still have to live with some of the limitations and ugly things from the hastily hacked together CPU that was the 8086, for example no real general purpose registers: all the "normal" registers (E)AX, (E)BX, etc. pp. are bound to certain jobs at least for some opcodes. No neat stuff like register windows and shit. Oh, I hate the 8086 and that it became successful. The world could be much more beautiful (and faster) without it. But I rant that for over ten years now and I guess I will rant about it on my deathbead.
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Re:Die already ! (Score:4, Funny)
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Most software developers care more about things like good development tools and the convenience of binary compatibility across a range of devices from supercomputers to laptops to cell phones.
Cross-compiling will always suck and emulators will always be slow. As lower-power, more highly integrated x86 chipsets become more widespread I expect to see the market for PowerPC, ARM and other
Re:Die already ! (Score:5, Insightful)
The attempts to improve the design with 80286 and 80386 were not very successful... they merely did the same shit to the 8086 that the 8086 already did to the 8085: double the register size, this time adding a prefix "E" instead of the suffix "X". Oh, and they added the protected mode... which is nice, but looks like a hack compared to other processors, IMHO.
The first instinct of the engineer is always to tear it down and build it again, it is a useful function of the PHB (gasp!) that he prevents this from happening all the time.
It's not the tearing, it's the popularity (Score:3, Interesting)
Perhaps this can be taken as a lesson that it is more fruitful to evolve the same design for the sake of continuity than to start fresh with a new design.
Nope. The best strategy is to push whatever product you have on something that will be sold on a massive amount of machine and become so much pervasive that it will become standard. Then everyone will stick to it because of compatibility to legacy code.
8086/8088 didn't succeed *because* it was a 16bit hack of the 8008/8080/8085. It succeed because it was sold on the IBM PC (lots of sales) which in turn got cloned (even more sales of 8088s). By the time you sit back and try thinking about it, there are 8088
June 8th (Score:5, Funny)
Jerk.
alt.x86.die.die.die (Score:2)
and long live x86
Are you out of your mind!? OK OK, I'll admit that commercially, Intel was genius in making backward-compatibility king.
But on a technical side, the world would be such a better place if we could just switch to more modern architectures / instruction set. The chips would be smaller and more power efficient, not having to waste space on a front-end decoding those legacy instructions for the core, for example.
I know, Intel tried to break with the past with the Itanium. They were wrong in betting that the comp
Certain? (Score:2)
How "certain" they were? "Certain"?? Surely you mean "correct", "right", or perhaps "prophetic".
Intel, 1978 (Score:2, Informative)
Happy birthday! (Score:5, Funny)
Out of interest... (Score:3, Interesting)
Anyone have any ideas?
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On top of that, it's probably subject to change with each micro-architecture.
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ARM architecture is 25 years old (Score:5, Interesting)
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Development of the ARM architecture began in 1983, but the first prototype ARM 1 processors weren't completed until 1985, with the ready for market ARM 2 being available in 1986 when the Acorn Archimedes computers were released.
Report to Carousel (Score:5, Funny)
And Have We Learned Our Lesson? (Score:3, Interesting)
No "it was necessary" arguments please. I'm not panning reverse compatibility, merely lamenting the unfortunate stagnating side effect it has had.
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Thirty years wasted.
"Dawn of a New Era" (Score:2, Insightful)
Intel introduced non-x86 three times ... (Score:3, Interesting)
So what happened then is that Intel emulates itself using more modern architectures. The underlying engine changesd to RISC around 486(?), wide-words, and more recently cells. All emulate the ancient x86 instruction set. Each generation needs proportionately less real estate to do this. Last time I looked it was 5%, but might be under 1% now.
So? (Score:5, Funny)
Wake me up when it turns 32.
Happy Birthday! (Score:5, Funny)
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We've been using it for 100% of mine. The 80386 was still shiny and new when I was born.
See, this is one the reasons I come to Slashdot. Other discussion boards make me feel so old because I remember using my old 486DX2/66.
What other discussion boards? (Score:3, Funny)
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Re:1978?? (Score:5, Interesting)
Re:1978?? (Score:4, Informative)
Oh, we suffered back then, believe me...
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1988? Where the hell do you live? In 1988, the 8086/8088, 80186, and 80286 had already been on the market for years. The 80386 was the CPU to have and the 80486 was only a year away.
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Re:1978?? (Score:5, Informative)
Comment removed (Score:5, Informative)
Re:Legendary? (Score:4, Insightful)
I do believe that was first done by an x86 CPU, the NexGen Nx586 (the predecessor to the AMD K6...)
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Everything the x86 series did, someone else did first on some other processor (68k, Sparc, MIPS, and PPC, to name a few), and usually better, because they didn't have the handicap of backward compatibility.
Nevertheless, ever since the Alpha started faltering in the late 1990s, x86 processors have usually been the fastest or almost the fastest microprocessors available on the market at any given time, while being the most cost effective by a wide margin. At the end of the day, that's all that matters. (That, plus the fact that the backward compatibility "baggage" enables people to actually run the software they have.)