Preview of Intel's Dual-Core Extreme Edition 289
ThinSkin writes "Intel let ExtremeTech.com sneak behind the curtain of its anticipated Dual-Core Pentium Extreme Edition processor for a full performance preview with benchmarks. Bundled with essentially two Prescott cores on one die, the Extreme Edition 840 processor clocks at 3.2GHz and contains a beefed-up power management system to keep the CPUs running cool during use. Expect Intel's dual-core line to hit the streets sometime this quarter. No word on pricing yet." Update: 04/04 17:26 GMT by T : Timmus points out FiringSquad's preview, too, writing "The benchmark results are mixed, with a few applications taking advantage of the new CPU, and some that don't." And Kez writes in reference to this article to say: "Our article on HEXUS.net, covering the P4 EE in detail, states the price as £650 (that's what we're looking at in the UK anyway, not sure about the U.S.)."
How about (Score:4, Informative)
Re:Would I need the "Pro" version of XP? (Score:5, Informative)
Re:Ketchup (Score:2, Informative)
Re:How about (Score:5, Informative)
http://www.anandtech.com/memory/showdoc.aspx?i=20
See the last paragraph
Re:How about (Score:4, Informative)
Nobody has EVER used the term 'dual-core' to describe dual-processor SMP. Dual-core has always been in reference to two cores on one chip.
Re:Dual P4 = Back to the old days? (Score:4, Informative)
http://www.hexus.net/content/reviews/review.php?d
Going to be about £650 in the UK according to HEXUS.
Re:Ketchup (Score:5, Informative)
Re: sharing I/O bandwidth. Intel has to do this because they don't have a built-in MCH. It has *nothing* to do with "selling chips with 2 normal P4 dies on them".
Re: Amd's offering. AMD doesn't have to change their design because they have a MCH onboard. That's why the number of pins can remain the same. On the flip side, if you change memory type, you'll have to throw away the chip. It's called engineering tradeoffs, and both companies do it.
Arrgh... practically every point in the above post is misleading or wrong, and it get's modded to +5.
Re:How about (Score:3, Informative)
No, they are like winesap and mcintosh apples.
two cpus are two cpus.. the OS sees them and uses them as it does other resources. dual core the OS does not see, the cpu employs the two cores to execute more pipelines in parallel.
Then why is it that I am posting from a dual core workstation [hp.com] and top shows two distinct CPUs?
Re:How about (Score:5, Informative)
Care to elaborate on the difference?
Typically what they mean is that Intel's design is not functionally different than having two distinct processors as you would in a typical SMP setup.
If you look at the diagrams on the second page of the article, you'll see there's no direct communications between the two cores on die. If the two cores want to check cache coherency or system resouces access it's arbitrated over the sytem bus.
AMD uses a 'System Request Interface' that all cores on a die will connect to. There's actually local communcations between the two cores. You don't have to hop onto the system bus (or HTT link in this case) to request something that's sitting right next to you. This really only works well since Opteron is a NUMA architecture to begin with, you don't have to go snooping around to see who else is using the data because unless the local SRI has 'checked it out' you have exclusive access, and you don't need to verify that.
Re:Cool?!? (Score:4, Informative)
Re:Ketchup (Score:5, Informative)
Ok, the two dies on one chip was true, or believed to be true when they first demoed:
Source: http://www.xbitlabs.com/news/cpu/display/20040915
I'll concede that point to you - that Intel is now putting 2 cores on a die... however they were never engineered to work that way initially. They only have an 800 MHZ FSB, not 1066 like the newer P4's, so they have even less bandwidth to share. Want a source?? Here:
Source: http://www.anandtech.com/printarticle.aspx?i=2252 [anandtech.com]
As far as my other points go, let's go over them, shall we???
"the new dual core P4s won't be compatible with a majority of Intel boards on the market"
Source: http://www.theinquirer.net/?article=21793 [theinquirer.net]
"The two cores use hyper transport to communicate with various system devices"
Source: http://www.amd.com/us-en/0,,3715_11787,00.html [amd.com]
It actually uses a cross-bar to handle the switching as well.
"Now for the best part - anybody with an existing Socket 939 AMD based motherboard will be able to use one. Worst case, you'll have to download a bios update to enable it, but it will work."
Source: http://hardware.gamespot.com/Story-ST-x-1583-x-x-
"AMD designed the K8 core to be dual ready out of the box, so this whole thing about them having an extra year isn't exactly true - they've had much longer than that."
Source: http://www.theinquirer.net/?article=13344 [theinquirer.net]
Still think almost my whole post was wrong? About what you said:
"Re: sharing I/O bandwidth. Intel has to do this because they don't have a built-in MCH. It has *nothing* to do with "selling chips with 2 normal P4 dies on them"."
It has EVERYTHING to do with having 2 P4 cores in a single package - look at that anand article I posted above, here is a quote from it:
"The major issue with Intel's approach to dual core designs is that the dual cores must contest with one another for bandwidth across Intel's 64-bit NetBurst FSB. To make matters worse, the x-series line of dual core CPUs are currently only slated for use with an 800MHz FSB, instead of Intel's soon to be announced 1066MHz FSB. The reduction in bandwidth will hurt performance scalability and we continue to wonder why Intel is reluctant to transition more of their CPUs to the 1066MHz FSB, especially the dual core chips that definitely need it.
With only a 64-bit FSB running at 800MHz, a single x40 processor will only have 6.4GB/s of bandwidth to the rest of the system. Now that 6.4GB/s is fine for a single CPU, but an x40 with two cores the bandwidth requirements go up significantly."
Re:Needs OS and app-level support ? (Score:4, Informative)
Multithreaded applications spawn off multiple segments of executable code in memory to do different things...a network scanner that operates in a multithreaded model might spin off a thread for every few hundred connections, so it can handle more in parallel.
"Multithreaded" applications are built to parallelize easily, as each thread can hit a different physical CPU. Single-threaded applications will also benefit from multiple CPUs/cores, but less directly: a single-threaded app would have less resource contention on a multiple CPU system, vs a single CPU system.
The OS scheduler is the deciding factor for what-goes-where and there's some hefty math involved for a lot of it...most of that, however, is handled automatically and transparently (although you can "force" affinity to CPUs if you're so inclined.)
Re:Ketchup (Score:1, Informative)
While these differences are much higher as more CPU's are linked, it will still make a difference in a single chip/dual core setup.
Re:Cool?!? (Score:3, Informative)
Of course, here in the UK, mains voltage is 230V, so with a normal maximum of 13A we could go up to about 2760W.