Open Source Finally Hits Real Silicon 247
pagercam2 writes "While Open Source software has many success stories, hardware and particularly chips haven't had as much. While there have been multiple Open Source projects, none have come to a final product until now. The OpenRISC 1000 has been implemented by Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products) along with PCI, 10/100 Ethernet, serial, GPIO etc. ... Details and pretty pictures available at OpenCores.org, and it even runs uClinux. Good Job!"
One can always hope.. (Score:5, Interesting)
If they make money with this and other chip fabricators get on the open source boat then perhaps one day we'll see an entire open source chipset and motherboard combo. No "SecureThisBIOS" and "TrustedThatOS" needed.. That would be damn sweet.
Open Source Chipsets (Score:5, Interesting)
Or, I'm just being fanatical and ranting about nothing, whatever.
Hardware development (Score:3, Interesting)
After all, you really don't want to have to submit a critical bug patch when the first mass run of chips is half-done... (Or the coder whose bug it fixes!)
What can't be open-sourced? (Score:5, Interesting)
In general, what problems would there be in creating open-source engineering designs for hardware of all kinds branched off from off-patent intellectual property? That, as it turns out, was the express purpose of the US Patent system as conceived by Benjamin Franklin, unless I am mistaken.
Until 'trusted' is mandated by law.. (Score:3, Interesting)
Dont laugh, its comin... The hints are already in the air.
Re:Open Source Chipsets (Score:5, Interesting)
I think that a good and durable machine could be developed with a high speed bus and provide most, if not more speed than people need.
Re:Whats the point........ (Score:2, Interesting)
cool, but I want more specs (Score:5, Interesting)
Judging from the specs included at the linked site, this core compares favorably with CPU cores from ARM, NEC and others who make big bucks selling (and supporting) these cores for system integration. This is interesting, and it's maybe even more interesting that I haven't noted it in any trade journals (did I miss it, or has this thing been going on under the industry radar?)
However, it seems like the CPU core itself is open-source, while a lot of the bonus features on the SoC (System On a Chip) example cited are IP from Flextronics (the the company that did the physical design for this open-source CPU core, which was manufactured by UMC). I can't tell for sure because the site is slashdotted already. The links on PCI, JTAG etc. would presumably tell if all these IP macros (besides the CPU) are open source also -- does anyone know for sure?
Either way, the specs on the sample chip are interesting: SoC with OR1200 CPU implemented by Flextronics Semiconductor: 32-bit general-purpose microcontroller, UMC 0.18um fab process, maximum clock frequency of 160MHz. This SoC contains (1 each I assume): OR1200 processor, Memory Controller (FLASH, SDRAM, SRAM, DPRAM), PCI 2.2 32-bit interface 33/66MHz, Ethernet MAC 10/100. UART16550, GPIO, JTAG/Debug Interface.
BTW, 160MHz is pretty darn good, until you see that 160MHz is not really "MAX" as in "max (worst-case) operating conditions" as one usually specs these things. Usually, when a spec says "maximum clock frequency", it means that you can safely run the part at these speeds under the entire range of allowed operating conditions (temperature and voltage). It's rather meaningless to tell the fastest it canpossibly go (which would be 0Kelvin, with a voltage almost high enough to fry the cip), so wpecs tend to tell you the max safe speed.
That would be the highest temperature (usually ~70C, but it's really based on the junction temp, which is calculated from ambient temp, airflow, and package thermal characteristics -- higher than 25C in any case, since that's usually called "typical"), lowest voltage (usually nominal minus 5% or 10%; so for 3.3V system, worst case voltage would be 3.3-0.33=2.97V, for 1.8V core it would be 1.62V), and slowest process from the fab (whther this is the case or not is unspecified in the list). Instead, lower down the page I see:
Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core
I could take a wild guess and say the thing would run at least 125MHz (respectable for the tech at hand), so calling it 160MHz (but not at worst-case conditions) is a little odd, or at least non-standard. If it were a "normal" industry player quoting me a part's clock rate that way, I'd become very, very suspicious of them for the rest of the negotioations.
It's still way cool, and if those IP cores are all available open source also, I'm really excited. But, I still have a lot of unanswered questions that I expected to see at least a brief mention of:
Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.
Re:homepage: (Score:5, Interesting)
the real question is: where's the compiler? no, i didn't read the article, because the site is slashdotted. i presume they will have a gcc port shortly, if it doesn't exist.
the real problem with open architectures (mips, arm, sparc,
if this project is dedicated to optimizing the compiler for their cores, they could give established players a run for their money in performance. or at least force other core makers to distribute optimized compilers at far lower costs.
this is a good thing for everyone.
Watch out - Xbox and Globalization (Score:4, Interesting)
Flextronics also makes the famous XBox for Microsoft in their Guadalahara Mexico facility. I just listened to a special on NPR about globalization and NAFTA and an economist was saying that without NAFTA the XBox would cost $400.
Your Cisco routers would probably cost more too, but I'm not sure if the cheap prices are worth it for the loss of US jobs.
Re:Watch out... (Score:5, Interesting)
But I'd like to point out that opencores has had a fair amount of its open IP commited to silicon to date... not via lithographic processes maybe, but in FPGA's at least in onesies twosies lots if not more.
It's pretty sweet to be able to put a Z80 core on an FPGA along with a few peripheral cores and make a machine-on-a-chip that can run your legacy embedded code with little or no change... and at a faster clock rate.
It was a trick question (Score:5, Interesting)
This represents a branch point from the First World industrial paradigm of economy of scale and elimination of manual labor, coupled with planned obsolescence and faddishness to ensure a short interval between new car purchases. An open-source car reverses this drastically. Low economy of scale and higher manual labor content coupled with an open-ended product lifetime shifts the focus from the manufacture of the car to that of its components. The car owner repairs the vehicle over a period of many years, possibly turning over the majority of its components one or more times over a long period of time. Small-scale manufacturers would build a mix of components based on demand for specific versions of a component. Clever management of the project should consciously support this. This business model is unsustainable by massive industrial concerns, but might work well in an economy with lower-skilled, small-scale enterprise. It would not be massively profitable, but may be a model for keeping large populations employed.
If the interconnection ot the automobile's components is carefully and thoughtfully evolved, a single vehicle might be an ever-changing machine, gradually absorbing better components over time. It would not be a static piece of technology that quickly becomes obsolete. This is a subtext of my original post.
Re:cool, but I want more specs (Score:3, Interesting)
BTW, The JTAG TAP controller is an IP core as much as anything, and is usually offered in paramterized form (so you can enter variables to decide options and then compile to get your "semi-custom" core), and is comprises about 2-8k gates depending on the number of features implemented, and not including the individual BSRs (Boundary Scan Registers) at every IO.
Maybe even bigger if you include all possibilities of 1149.1, but I've never seen all that used, and as far as I know size is not a defining characteristic of cores. So no, JTAG is not as big as PCI (~10kgates for master + target), but a core nonetheless, IMHO.
Anyway, I was most interested in the PCI (would prefer PCI-X or PCI-Express), ethernet, UART, and SDRAM controller (DDR would be sweet).
I'm a little confused about the IBM reference, since if you're using UMC as a fab, you don't get to use IBM cores unless you also use IBM as an ASIC vendor on some level. Unless that has changed in the last 4 years, which I guess is possible.
Re:So what's the point? (Score:4, Interesting)
But once you have a board with the chip on it, you can even get all the development software for free from Xilinx and the programming hardware's not too expensive (last I checked anyway, I was always able to use my school's stuff).
I always thought it was pretty nifty to compile a CPU and upload it into a chip using nothing but my laptop...
Open source cores as disruptive technology (Score:5, Interesting)
Re:Good job but not quite (Score:1, Interesting)
How many bogoMIPS (Score:1, Interesting)
Re:One can always hope.. (Score:2, Interesting)
This might not affect the industry much (Score:5, Interesting)
The cost of R&D and design of the chip is probably a drop in the bucket compared to building a chip fabrication plant. And much of it the advances required to make a fast chips would be in fabrication technologies (materials, layering, etc.) that might has nothing to do with the chip design. And these technologies are likely to be patented.
Re:So what's the point? (Score:3, Interesting)