Open Source Finally Hits Real Silicon 247
pagercam2 writes "While Open Source software has many success stories, hardware and particularly chips haven't had as much. While there have been multiple Open Source projects, none have come to a final product until now. The OpenRISC 1000 has been implemented by Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products) along with PCI, 10/100 Ethernet, serial, GPIO etc. ... Details and pretty pictures available at OpenCores.org, and it even runs uClinux. Good Job!"
So what's Sparc V? (Score:4, Informative)
Good job but not quite (Score:5, Informative)
The LGPL'd SPARC-compatible processor Leon [gaisler.com] was put to silicon a long while ago.
Give credit where credit is due, the Leon tracked over this territory years before OpenRISC.
Flextronics Xbox (Score:5, Informative)
Flextronics would actually be best known for being the main manufacter of the Microsoft Xbox.
http://www.wired.com/wired/archive/9.11/flex.ht
Re:Finally a competitor for the 286 (Score:2, Informative)
homepage: (Score:4, Informative)
Silicon Implementations
Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.
Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz. The SOC features:
* OR1200 processor
* Memory Controller (FLASH, SDRAM, SRAM, DPRAM)
* PCI 2.2 32-bit interface 33/66MHz
* Ethernet MAC 10/100
* UART16550
* GPIO
* JTAG/Debug Interface
The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.
Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board.
Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.
This board was the first prototype built (not fully assembled at the time)
Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock.
Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.
Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.
IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.
/.'ed already (Score:4, Informative)
Project: OpenRISC 1000
Silicon Implementations
Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.
Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz.
The SOC features:
The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.
Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board. Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.
This board was the first prototype built (not fully assembled at the time)
Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock. Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.
Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor. IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.
Re:Whats the point........ (Score:5, Informative)
Sure.
For chips derived from this test SoC:
MP3player
VoIP hard phone
Network Router
Firewall
Wireless Access Point
DVD player
Car stereo
Cell Phone
PDA
For uClinux:
It's all around you, many of the products _you_ use every day run it. Just because you think Linux means servers and desktops doesn't mean that's the only place it's widely deployed!
J
Re:Almost Used in iPod (Score:4, Informative)
Bad troll. Bad.
Re:Almost Used in iPod (Score:2, Informative)
Re:So what's Sparc V? (Score:5, Informative)
For quite awhile, as I understand. The Leon chip [gaisler.com] is an example of this. Other areas such as Fujitsu's processors and set top devices have been based on Sparc.
I'm not saying that OpenCores is a bad thing. I'm just refuting this "we were here first" bullshit.
Re:So what's the point? (Score:4, Informative)
I'm currently designing a tiny Single Board Computer (Z80-based) for embedded control applications. Sure, the specs aren't that impressive (a couple MHz, 32K RAM, 512K flash), but that's not the point. The thing is designed to fit on a robot and run on batteries.
Open hardware designs are still about geeky people doing fun things.
Re:Open Source Chipsets (Score:5, Informative)
Re:What can't be open-sourced? (Score:2, Informative)
Because physical hardware costs physical resources to build (modern designs are more efficient to construct because of advanced materials and fabrication techniques now available) and consumes physical resources (newer designs are more energy efficient), it's more likely to make sense to pay the expense of creating a modern design up front, depending on the age of the OS desgin.
Contrast this with the unique position of software where it's possible to gradually accumulate more and more functionality until a package becomes good.
(Open-source is not some sort of magic uber-nostrum that solves every problem.)
Re:Where do they expect this to go? (Score:3, Informative)
This might come as a shock to you, but ignorance is not bliss. Use Google. Read up on "Trusted Computing."
Trusted Computing Homepage. [trustedcomputing.org]
Trusted Computing Criticism [eff.org]
Decide for yourself, but I'm able to verbally articulate myself so I don't think I'm dumb but I do think you're ignorant.
--K.
Sheesh... (Score:1, Informative)
That's a crapload of configurable logic for peanuts.
But wait! There's a ton of stuff available at www.opencores.org to play with. Some of it is already GPL'ed. There's processors, FPUs, USB cores and all sorts of other stuff.
Of course, it's hard to get FPGA's that run upwards of 150MHz right now, but they've been growing by leaps and bounds lately. If you want to learn to do some logic design, pick up a book on VHDL or Verilog and go to town!
My $0.02
Re:So what's Sparc V? (Score:5, Informative)
From the SPARC website [sparc.org]:
Hell, it doesn't even look like much of an open standard. You need to license the instruction set in order to be able to implement it. This is like saying UNIX is open source, since anyone can implement POSIX and license the UNIX trademark, and because a lot of people have licensed the source code. That's not open source; it may be an open standard (although I'd argue that in order to be an open standard, you can't restrict who implements it with licensing agreements). So really, SPARC is in no way open source, and I wouldn't even consider it an open standard.OpenCores, on the other hand, is really open source. You get the full design of the entire chip; you could just produce the chip by sending the CAD files to a chip fab and having them produce it. All of the Verilog/VHDL/etc. are open and freely available for you to use and modify. Even if you license the SPARC ISA, you still have to design the chip yourself.
Hell, there are plenty of ISA's that you can license. The IA32 architecture is implemented by Intel, AMD, Transmeta, and others. PowerPC is implemented by IBM and Motorola. MIPS chips are produced by lots of people. Open ISA's are a dime a dozen. What's important about OpenCores is that the full chip design is completely open.
Re:So what's Sparc V? (Score:3, Informative)
You need to license the instruction set in order to be able to implement it.
What is the GPL? It is a license. You need to license GPL code before you can use it. The main difference is that everyone is used to GPL software being easily accessable (i.e. Click and download). That's not actually a requirement of the GPL or Open Source. In fact, if the shit hit the fan, many OS developers may receive no compensation for damages due to a failure to force the user to accept the terms of the agreement before providing said service.
Just something to think about.
Re:So what's Sparc V? (Score:2, Informative)
If by "use" you mean "run", you are absolutely incorrect. You are only required to accept the GPL if you want to distribute the software. To quote from the GPL (which you should read): "Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted..."
Re:Flextronics Xbox (Score:2, Informative)
Flextronics would be best known for the production of any electronics that traditionally was made by a company near you. Or Flextronics would be best known for doing the dirty work of moving jobs to Asia so that it doesn't reflect badly on major western brands.
Re:This might not affect the industry much (Score:3, Informative)
Yes, but this is only true for companies who do full custom designs and do their own fabrication. There are plenty of ASIC companies which will do everything from mask development to testing for you. There are also companies to which you can outsource manufacturing, if you really want to go the full custom route.
MIPS/Watt of OpenRISC,XScale,VIA C3 and Transmeta (Score:3, Informative)
a VIA C3 800 + motherboard is about 12W. Given the CISCy instructionset you get about 1200MIPS on that. so 100MIPS/Watt (200MIPS/Watt bare) [don't believe me? many claim this chip gets 1600MIPS, but they are probably reading BogoMIPS as MIPS. still, it's an extremely fast integer chip, especially considing $/Watt]
an Intel XScale 600MHz is also RISC and lets ignore the ARM Thumb instruction set, you will get about 600MIPS out of that as well. But just the bare chip is only 0.5W. Lets say inside your favorite PDA that chip is 2.5Watts. 240MIPS/Watt. (1200MIPS/Watt if you run it bare)
Personally I have a very low opionion of Transmeta. But lets say you get a 700MHz transmeta. The bare chip is 1W, on a laptop motherboard let's say it's 4.5W. Now transmeta's MIPS performance isn't quite as sexy as CISC or even RISC. Let's just for the sake of argument it gets an even 700MIPS (which it doesn't). That's 156MIPS/Watt (700MIPS/Watt for the bare cpu).
So the winners are:
XScale @ 240MIPS/Watt
Tranmeta @ 156MIPS/Watt
OpenRISC(Flextronics) @ 114MIPS/Watt
VIA C3 @ 100MIPS/Watt
ps- the reason I tried to compare everything on a motherboard is because that is the only practical way to use such a chip. This is done to show power consumpution from a consumer's point of view. (looking back perhaps I should have compared battery life in simular products).
If you're a product designer you might be more comfortable with the raw MIPS/Watts, assuming that the periphal chipsets available for each product runs roughly the same watts for the same functionality. (which isn't the case for any of these, as you can see by my motherboard wattages).
Re:Sheesh... (Score:3, Informative)
FPGA rules for sure (Score:3, Informative)
I use Xilinx FPGAs, which are both cheap and super powerful. For the company, i am woring for, i am developing digital signal poccessing processors and software for them using FPGA. one twenty dollar FPGA can process extremely high-order filters and analyzers on samplerates as high as hundred MHz, which we use for microwave communication in extremely baad environments.
With my addiction to open sources i am on developing a open-hardware computer (for a long time already)and will put online all sources, schematics, cerbers, layouts, so any Geeky guy (or Woman -- Jennifer E. Elaan? sorry if i am wrong) will be able to put together one, or buy components and ask somebody who can.
You would say You might need license for buying FPGAs used in by militaries for missle targeting (yes!) - then You would would be right. However there are no problem to by those in russia or anywhere else without having any license.
So hold on for a home-brew computer era coming back (from the times we were assembling Sinclair ZX Spectrums 16k and 48k at our homes:). How those computers will reincarnate from tv-calculators to plaforms being able to "process" (remove:) macrovizions, copyright bits on multiple streams, as well as directly capture satellite broadcast and process it.
Only drawback is that it will be with its own OS - BrainOS i am working on at te time. Just because it will be programmed not in sequential language, but parralel (VHDL) as it will be embedded in hardware (however modifiable by user at any time -- fpga!). We should be ready about that we could not (legally:) build any x86 on it, as we will have no license from intel. But i don't miss them. For running old x86 software and games we can use old x86 computers, which are widely available in trashmarkets.
asap i will try to do some artickle on this and try to post it there, that we could discuss what is ood and what is not).. Leave me some personal message if You are interested in it, so i could see how many of us are interested in this project. I hope it to be the same as linux is for software world, it could be for hardware world.