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Hardware

Open Source 3D Hardware 112

An anonymous submitter writes: "Open Source haven icculus.org has updated with a new project: Manticore. Different from most Open Source projects however, Manticore is hardware. It is a 3D graphics acceleration design, coded in VHDL. Although still fairly early in development, its goals are similar to those of other 3D cores, from companies like NVIDIA and ATI. The project includes an SDRAM controller for storage, and a VGA unit for display, in addition to the 3D rendering core. It is available under the Design Science License. Source, Documentation and other information available at the Manticore Homepage."
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Open Source 3D Hardware

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  • by Anonymous Coward
    ...but to actually make the dang thing won't they need a million-dollar chip fab or something?

    • No way! just get your 2400dpi laser printer to print resist onto a copper-clad board, then etch in your coke (don't drink coke afterwards, might taste like PitrCola) ... umm.. then jam the chip into a wad of steel-wool [for the interconnects] then get 5min epoxy with some black dye to seal it... then...ummm. Oh bugger it, just drink the coke and wait for someone else to do it.
    • Nope.

      Transmeta [transmeta.com], maker of the Crusoe processor for mobile applications (</marketroid>) contracts the actual manufacturing process out to Texas Instruments [ti.com].

      Moreover, they already have a working model using development boards, for from the front page of the link I quote:
      It is written entirely in VHDL. Originally designed and tested using Altera's APEX20K200E [altera.com] FPGA and Nios development board, the design is now ready for the public.

    • No problem, just use the nearest Starfleet standard issue replicator.

      After they invent it.
  • by Anonymous Coward
    ...you are a THIEF if you use open source hardware!!

    Microsoft needs your money! Now!
  • Open Cores? (Score:5, Informative)

    by brejc8 ( 223089 ) on Saturday June 01, 2002 @06:58AM (#3622088) Homepage Journal
    Why dont they put it on Open Cores? [opencores.org]

    Thats where all open hardware projects are.
    • Re:Open Cores? (Score:2, Informative)

      by Judecca ( 34485 )
      We are actually putting it on Opencores. We're just cleaning up the code to their coding standards.

      Should be up there within a month or so.
  • by eddy ( 18759 ) on Saturday June 01, 2002 @07:01AM (#3622093) Homepage Journal

    Than the bitboys [bitboys.fi]!

    :-)

  • ditch VGA (Score:4, Interesting)

    by johnjones ( 14274 ) on Saturday June 01, 2002 @07:02AM (#3622095) Homepage Journal
    if they ditched the VGA it would be better

    simply because you would not have to add all that redundant crap into the hardware

    I dont care much for VGA other people do because they are lazy or cant modify their source code (-;

    (even MS will be ditching VGA for longhorn)

    regards

    john jones

    • Re:ditch VGA (Score:2, Informative)

      by WWWWolf ( 2428 )

      Ditching VGA might sound like a noble goal. Until you try to put the card in the machine and boot. Linux needs at least text mode, and Windows seems to fall back to VGA if it can't find drivers for anything else... (at least that's what happened in 98, NTs probably handle this diffenently =)

      At least implement the VGA text modes, or else you need to install the drivers blind... May be your thing, but not mine! =)

      • I don't think Linux needs VGA text mode - you can compile without any VGA support at all, and assuming you had the appropriate framebuffer driver included, there shouldn't be any problem.

        And if you're using open source hardware, are you likely to care about windows support?
        • I don't think Linux needs VGA text mode

          But the BIOS does. Without a text mode, many versions of BIOS will refuse to complete POST.

          you can compile without any VGA support at all, and assuming you had the appropriate framebuffer driver included, there shouldn't be any problem.

          So how will the Linux distributions' installers support the various flavors of display hardware if they can't fall back on text, VGA, or VESA? That'll make for one big a$$ kernel on the install disc.

  • by inflex ( 123318 )
    Couldn't they just wack up something using a FPGA ? Surely for things like mid-range performance there are sufficiently dense FPGA's which can be coded up with [at the very least] basic 3D primatives (At least for testing).

    ...

    Else we could go for a million LEGO Mindstorms.
    • -doh- it was done on a FPGA ...
    • Re:FPGA (Score:1, Redundant)

      by brejc8 ( 223089 )
      What they need is an [xess.com]

      I used one when I made my MIPS clone and it was huge. I culd fit an array of 14 full 32 bit processors on one Vertex chip all working at 100MHz. The cool thing is that they also have a VGA port and a DAC.
      • Re:FPGA (Score:4, Informative)

        by brejc8 ( 223089 ) on Saturday June 01, 2002 @07:13AM (#3622114) Homepage Journal
        Bugger! Lets try again.

        What they need is an XESS board [xess.com]

        I used one when I made my MIPS clone and it was huge. I could fit an array of 14 full 32 bit processors on one Vertex chip all working at 100MHz. The cool thing is that they also have a VGA port and a DAC.
        • and that would cost how much exactly?

          There's no way any "open source hardware" that relies on FPGAs is ever going to touch custom silicon on price or performance.

          Face facts. Hardware isn't the same as software, and an open source model isn't going to work.

    • We're using Altera FPGA's for testing and development.
  • though i havent followed its progress, i remember a similar effort in the area of cpus, project f-cpu [f-cpu.org].
  • Peculiar numbers. This gives a small maximum resolution of 1024x1024, but really rather excessive accuracy. We don't really need 1/64 pixel accuracy do we?
  • what would really rock, is if they gave us all the details (equipment etc) that we could order off there site, to actually build the card.
    i may know asmuch about electronics as most people know about nuclear physics, but that would be quite cool if you ask me, is it even remotely possible?
    • If you don't know anything about electronics, what would be the point? It would have to at most be a ramsey-type kit, sort of like painting by numbers, but in this case you would probably need a hot-air rework station to be able to put the thing together. Soldering thousands of tiny SMT components and chips with high pin densities doesn't sound like too much fun to me. :)
  • Looking around the project website, I see that they make no mention of drivers. These guys are undergrad/recent graduate Electrical Engineers, and I can understand their focus on the hardware, but a card is useless without drivers. Which leads to the question, what 3D API will these drivers implement? OpenGL of course. An open source implementation of The Other One would be self contradictory :)

    But ... doesn't it cost money for an implementation to be tested for OpenGL compliance? Like mesa [mesa3d.org] is an open source software implementation of opengl, and probably satisfies all the tests. But it ain't certified as compliant because a) nobody's coughed up the cash and b) probably past interests in not having an open source implementation back then (though opengl is fully open sourced now). Think of how JBoss had a hell of a time getting Sun to admit JBoss was even halfway J2EE compliant...

    It's an interesting project but drivers guys, put some thought into the drivers...

    • We're definately going for OpenGL here.

      We're still a long way off from requiring drivers, because we have no way to communicate with the CPU yet. We're working on a PCI interface, and when that is complete, and the core is able to perform tasks required by OpenGL then we're going to work on drivers.

      We also need some really good driver programmers for that.
  • Fantastic! (Score:3, Funny)

    by Rhinobird ( 151521 ) on Saturday June 01, 2002 @07:31AM (#3622135) Homepage
    Now all we need to do is get a computer to emulate the graphics card, hook it up to an open slot in another computer, and write a linux driver for it. Then we, too, can experience the joy of playing Quake 3 through Wine at a resolution of 200 X 180 at 10 FPS.
  • Are we sure Manticore is not a genetic engineering project?
  • Success (Score:2, Interesting)

    by march ( 215947 )
    The success of open source is that it is easy for the masses to get access to the "products". This would not be the case with an open source hardware project.

    Unfortuantely, I suspect this will not be successful.
    • Re:Success (Score:4, Interesting)

      by brejc8 ( 223089 ) on Saturday June 01, 2002 @08:02AM (#3622168) Homepage Journal
      All you need is for some one to design a card you can place in your AGP/PCI slot which has an FPGA.

      These cards do exist and once open hardware becomes more popular you will be able to download your new graphics card compile it and stick it on your computer.

      Or even recompile your card to work better with a perticlular game or video standard.

      • Re:Success (Score:5, Informative)

        by svirre ( 39068 ) on Saturday June 01, 2002 @08:21AM (#3622200)
        Such cards do exist. They generally cost at least a few thousand dollars though.

        Also don't expect a fpga based card do outperform a dedicated circuit. Youll need an order of magnitude (at least) more silicon area to make a circuit on an fpga than on an asic, and you can never hope to match the speed.

        Furthermore you will need appropiate software to synthesize and run place and route on the fpga. These generally cost from around $10000 each, Though prices are negotiable. If you can manage with less you might be able to make do with the vendor provided synthesis software, but don't expect good results. Synplicity or leonardo spectrum (to be replaced with Precision Synthesis) are the good choices.
        • Re:Success (Score:4, Interesting)

          by brejc8 ( 223089 ) on Saturday June 01, 2002 @08:34AM (#3622232) Homepage Journal
          I've had 100Mhz designs running. If you pipeline them well then they they can go very fast. I'm currently running Delay Insesitive (DI) Asynchronous designs and they go really fast.

          The software can be free from Xilinx but I would prefair an open source project to have a linux version.

          The boards [man.ac.uk] we make in the university cost £100 each with a spartan or £300 with a Virtex 300 (damn big I got 14 MIPS R3000 CPUs on one ).
          As for the spartan you can still make some cool stuff with it. These [man.ac.uk] are some of the things I made with it.
          • Re:Success (Score:3, Informative)

            by svirre ( 39068 )
            Unfortunately the xst synthesis software that xilinx provides is next to useless. If you do your own optimizations, then fine. If you rely on the synthesis software to optimize (and quite frankly handcrafting logic optimizations isn't my idea of fun) then you won't get very good results.

            Xst isn't terribly compatible with regular synthesizable VHDL either. Expect some revriting.

            As for fitting a cpu core on a fpga: Sure cpu cores aren't particularly big (even on state of the art designs, the die area is largely used for cache rather than core.)

            As for pipeling: Sure you can get it up to a 100 MHz or so, but pipelining incurs penalties. You can very easily be bitten by data dependencies.

            As for size, we are working on a virtex II 6000, and it can barely fit a dprototype of a design which will occupy approx 4mm^2 of silicon area on the final 0.18um asic (granted the design would have been done somwhat differently if we actually targeted the fpga)
        • Re:Success (Score:1, Funny)

          by Anonymous Coward

          Furthermore you will need appropiate software to synthesize and run place and route on the fpga. These generally cost from around $10000 each

          Bah! Kids these days are such whiners. Back in my day, real men did their own placement and routing. First it was the C compiler, and now this. It just goes to show that the computing industry is going to pot.

      • Re:Success (Score:3, Interesting)

        by commonchaos ( 309500 )
        Or better yet, game designers could design their own cores and load these at run time, window managers could have special cores to speed up window management routines...
  • by Lethyos ( 408045 ) on Saturday June 01, 2002 @07:57AM (#3622163) Journal
    ...do they have to develop a 3D accellerator that is compatible with most software (OpenGL, DirectX, etc)? It seems to me that many of the design concepts in this arena are mired up in patents by giants like nVidia and ATI. For instance, doesn't nVidia have 'rights' to per-pixel vertex shader techniques?
    • Hardware is always "compatible" with OpenGL and DirectX. When writing an OpenGL or D3D driver, you basically provide a layer of abstraction that goes from the 3D API down to your own chip's instructions and data formats.

      When nVIDIA and ATI say that their hardware is fully API compliant, they mean that their hardware implements all the required features of the API in hardware, and their drivers provide the abstraction to compute everything in hardware too.

      I'm sure nVIDIA and ATI have patents on their hardware - this is entirely expected. But just as there are multiple pieces of code that produce the same effect, there are multiple designs of hardware that generate the same output.

      Also, pixel shaders and vertex shaders are two different things - they happen at two different stages of the rendering pipeline. I'm sure nVIDIA has patents relating to them, but DirectX and OpenGL have their own specifications for shaders which any hardware developer can implement.
    • And its not just nVidia and ATI, it's even more likely to be earlier 3D players who had more fundamental, less esoteric patents. Companies like Lockheed Martin, SGI and Evans and Sutherland.

      In particular, I believe Lockheed Martin had some fundamental patents on texture mapping that I recall were particularly impossible to get around. Perhaps someone with more knowledge of them can confirm or deny that?

      --LP
  • What was the license of Wine before the LGPL that would allow WineX to be closed source?

    Atto
  • Patents... (Score:3, Informative)

    by Karpe ( 1147 ) on Saturday June 01, 2002 @08:31AM (#3622225) Homepage
    There are many patents related to 3D graphics processing, hold by companies like nVidia, Matrox, ATI (just go to www.uspto.gov and search for your favorite graphics hardware company). And since this are not "software patents", they are already valid around the world. Are these guys considering this?
    • Well, they could do it the same way as a LAME MP3 Encoder does it. The source codes are for educational purposes only and should not be compiled. There. Similarly this project can just exist as a design. There is no hardware. Please do not try to fabricate, this is illegal. Heh.
  • by Chazmati ( 214538 ) on Saturday June 01, 2002 @08:36AM (#3622237)
    Q: I grabbed Manticore from CVS, but it won't compile on my x86 1.8 GHz P4.
    A: Manticore is a hardware project. You must fabricate the chip using the VHDL files.

    Q: Help, I can't get Manticore to fab.
    A: Are you using an Applied Materials Silicon Etch DPS II Centura 300 etcher? This is the only machine we have access to, we can't support other models.

    Q: I produced a wafer, what next?
    A: Many people use a dremel tool to cut the chip to size and mount in a 432-pin test carrier.

    Q: Do you have a PCB design for AGP4x?
    A: Check the mailing lists, most of the PCB layout guys are quite active there.

    Q: I finally have my Manticore graphics card. Where can I find the drivers?
    A: We need software developers! See http://www.manticore.org/contribute.html for details
    • I was just kidding, by the way.
    • I'm sure you were just being funny, but you wouldn't normally try to burn something like this onto an ASIC (application specific integrated circuit) - you'd compile the VHDL and load it into a big hoggin' FPGA (field programmable gate array).

      An ASIC is a chip you have MADE in a foundary - once it's fabbed, it is no more reprogrammable than any other chip. An FPGA is a collection of omni-purpose gates that are controlled by SRAM or flash - you can reprogram it to do what you want just be hitting the reset line and loading a new image into it. At work, we [ifrsys.com] (obdisclaimer - what I post on /. is my opinion, not my employers) use FPGAs to do a lot of signal processing.

      The bad thing is that an FPGA big enough for a decent accelerator would be about a $700-$1500 part.

      Now, what I can see it somebody doing enough devel on this to make a viable part, then getting it burned down to an ASIC and made avaible to the community. Yeah, that worked really well with IBM/Moto's CHIRP PowerPC boards.

      But what could happen is this chip could find its way into the next generation TiVo, or some other set top box. In that market, a synthesizable core that was royalty-free would RULE.

      I agree with some of the other posters, though - ditch the damn VGA compatibility layer, and just make a Linux (and *BSD) kernel console driver for it, an XFree driver, and a very basic BIOS driver for it. The BIOS driver can be stupid - just enough support to set modes, and print text. The kernel driver can take over once the system boots. Don't waste silicon making the framebuffer compatible with VGA (and thus EGA (and thus CGA)) - that design is a flat-out nightmare kludge. Go for a simple, clean, legacy-free design.

      And while you are at it, make sure the DMA path is secure - make sure you can program the chip so that a vertex list entry cannot corrupt system memory. I lurk on the DRI mailing list, and the lengths to which they have to go to keep the graphics chip from being an exploit are ludicuous. It slows down the DRI drivers relative to other so-called operating systems that don't concern themselves with security.
  • Manticore? (Score:2, Funny)

    by Bnonn ( 553709 )
    Anyone who's seen Dark Angel will know they produce some damn nice hardware
  • is download and compile me up a new videocard. sweet.
  • by Tet ( 2721 ) <slashdot@nOsPam.astradyne.co.uk> on Saturday June 01, 2002 @10:05AM (#3622418) Homepage Journal
    While I'm sure this is an admirable project, I'd much rather see icculus rescue me, and remove the only reason I still have a Windows filesystem: Serious Sam [icculus.org]. It'd be nice to get AvP [icculus.org], too, but Serious Sam is the one that counts for me. Yeah, I know it's a volunteer effort, but I'd love to see it deliver anyway.
  • Ok, some quick comments on various things I've read in these threads:
    • This project is meant for FPGAs only, not ASICs
    • It would probably take a Virtex-II FPGA to even remotely compete with a decent accelerator - and these mofo's cost $3000-6000 apiece
    • People would NOT need their own synthesis/implementation tools ($10000) because people could just upload the fully "compiled" bitfile - and they're only around a couple megabytes
    • The circuit board would be a MAJOR problem - board development houses will try to quote you around $50000 to press off ONE sample board
    • High-end FPGAs only run around 100 MHz - how are they going to do memory accesses to 233 MHz DDR and get bandwidth to compete with nVidia?
    • It takes a very nice motherboard to provide enough power to the AGP bus to run one of these guys - I've seen numbers as high as 5 Amps for a chip like we're talking about here

    Ok, all that being said, I think this project is a bit out of scope for what these people want to do. There's a really big reason that nVidia and ATI are where they are - capital and large teams of engineers. 'nuff said.

    • Re:Some Comments (Score:3, Interesting)

      by Judecca ( 34485 )
      What we want to do is learn how a 3D core works, and get some exposure.

      The reality is I want to work for NVidia or ATI, and what better way to learn the ropes than to try it yourself.

      Its not for mass consumption. So far we have a working board which can plug a monitor into it and render triangles. Further along than I thought I may ever get.

      Then again maybe some already large company would like to expand their scope, and bring in what will one day be a complete core.

      The reality is, its a learning experience.

      Jeff Mrochuk
      Manticore [icculus.org]
      • Hey, I think you're doing something pretty cool myself.

        What I'd like to see myself is an open Northbridge chip -- memory controller, PCI controller, probably AGP on board -- just so we can get some cheap PowerPC boards out there. I know there's a PCI controller on Opencores.

        /Brian
    • Re:Some Comments (Score:2, Informative)

      by sonpal ( 527593 )
      Some comments on your comments:
      • Any FPGA design can be converted into an ASIC design with minimal or zero modifications, and usually with a substaintial performance improvement. There are several companies out there that will take your synthesized netlist and give you an ASIC, and will do it cheaply. The FPGA vs ASIC break even point is in the ball part of 100,000 units and it's getting better every day.

      • While it may take a Virtex-II to compete with a decent accelerator for all applications, it may be possible to have multiple optimized implementation that are specific to specific applications. For instance, you could program the FPGA with an image optimized for 2D applications for general purpose use and then reprogram it with an image optimized for 3D applications as soon as you run your favorite FPS. Also, A decent sized Virtex-II can be purchased for US $323 [digikey.com] in single quantities, and roughly half that in quantities of 1,000 or more.

      • Design tools from Xilinx [xilinx.com] are less than US $1,000. And if you use their web-based tools, they are free.

      • The circuit board would not be a major problem. I recently designed a PCI board with an FPGA and SDRAM on it (and wrote the FPGA code) and we got our 10 board for less than US $2,000. Most of this is set up cost, of course, so it gets really cheap really quickly as the numbers go up.

      • 266 Mhz DDR RAM really only runs at 133 Mhz, and high end FPGAs can run at 300 Mhz. FPGA vendors often have hardware build into the FPGA to suppport high speed interfaces like that, or provide HDL source [xilinx.com] so that you can implement your own.

      • Even if it takes 5A to run these chips (slightly excessive IMHO), the requirement is at the core voltage (1.5V for the Virtex-II mentioned earlier). With a 85% efficient switching regulator (typical), that would equal 2.7A @ 3.3V or 1.8A @ 5V or 750mA @ 12V (all of which are available on the AGP connector). Besides 5A @ 1.5V is just 8W after you include the switching inefficies, and you probably have at least a 300W power supply, so it's less than 3% of your total power budget.

      • We do need to factor in assembly costs, which for a prototype run of 10 boards is going to to be about $3000 total, but the costs get really cheap if the quantity goes up, especially if the through-hole components are soldered by the enthusiasts who buy these cards.

        So, you don't really need all that much capital, and the open-source development model will provide the large teams of engineers.

        Unfortunately I can't contribute to this project because I code not in VHDL but in Verilog (which gets a lot more done for the same amount of effort in my opinion and others here [eedesign.com] and here [bilkent.edu.tr]).

    • Re:Some Comments (Score:2, Informative)

      by CrazyCoot ( 582774 )
      As a practising hardware and firmware design engineer, I take issue with some of your numbers. Not that it means I totally disagree with the conclusion, but we'll get there. 1. A decent Virtex 2 will set you back, but it's not 3k unless you need a million or two equivalent gates. I use a fairly high-end Virtex-II on a design and it costs about 1k. You would need only the programming tool and that's free for the software. The cable is specified on the Xilinx site, and it's easy to fabricate. There are other FPGAs as well - Altera makes a nice line in the sub 1k range, and it performs well up to about 150MHz. 2. Boards can be run ( let's say a 12 layer board , although that's overkill for this) in low quantities for about $500/board. I do prototypes like this almost weekly up to 24 layers ( or so it seems lately ) and I know what I am paying. You'll have to buy a panel, though, so the cost would be # on panel ( probably 6 for this size board on a small panel)* cost per unit - about 3k as a guesstimate. 3. DDR266 needs a base clock of 133MHz, which FPGAs can do quite easily now. The data and strobes burst at the higher rate, but local pipelining of the data buffers ( meeting the DDR spec for a 2x pipeline) is fairly simple. More difficult is the strobe delay adjusters, but it's all spec'd. I think the purpose is more to be able to generate a controller that could be used. Designing PCBs with fast DDR or fast anything really ( it's not just the raw speed, it's the timing budget ) is still a lesser known skill especially if it's soldered down. Designing a PCI card is child's play - I can get reference designs including layout from 10 places at least. The big issue here would be PCB layout - the tools to do this sort of unit *will* set you back 20-50k, and those are the tools neceessary for high density, high layer count, rules oriented boards. I don't think it's out of the scope for what they want to do, if they can lay their hands on the layout and schematic capture tools - maybe I'll help 'em design the board and lay it out ;) #include
  • by krishy ( 461184 )
    Well not exactly 3d, but simputer [simputer.org] is another hardware project which is released under the modified GPL
  • I'd like to see support for really slick hardware alpha acceleration of some sort. I could use that a lot more than extra 3D stuff. Probably so could a lot of business users. Perhaps a good place to start in making something that's cheap and useful.

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