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Hardware

Clockless Chips 236

Posted by Hemos from the really-think-different dept.
iarkin writes "TechReview is running a very interesting article about clockless chips. Clockless, or asynchronous, chips work very much faster and consume less power than their synchronous equivalents (Intel hade some experiments on these chips back in -97, the results showed that the asynchronous chips were three times faster and consumed only half the power)."
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Clockless Chips More

Clockless Chips

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  • This clockless thing must be caching on fast.. (Score:4, Redundant)

    by k98sven ( 324383 ) on Wednesday November 14, 2001 @03:53PM (#2565968) Journal
    .. otherwise people would've noticed this has been
    posted before [slashdot.org] (sept 15)
  • If chips were clockless, I'm sure that Intel and the various PeeCee manufacturers would have to re-think their marketing strategies.

    (It was nice to see AMD trying to break away).

    • Nah... (Score:2, Insightful)

      by KingAdrock ( 115014 )
      It wouldn't be that bad. The industry would just get away from numbers, and move to something like many software makers are doing today.

      In place of a 2Ghz Pentium IV we will be seeing an Axium Gold.

      It will take a little getting used to, but we'll get over it. Ford doesn't call their cars Model A's or Model T's anymore!

      • Re:Nah... (Score:2, Insightful)

        by DataPath ( 1111 )
        I think something similar to the current naming scheme would continue. There's very likely a few numbers on those processors that are indicative of speed. Clockless just means that it doesn't force operations to fit into a specified amount of time. So you take the smallest unit of operation, or the shortest processing path, and call that length of time a cycle, then state how many of those it can perform each second. It doesn't sound terribly useful as a benchmark, but then, MHz isn't really very useful. With pipelining and so forth, it doesn't give you a precise metric, but compared to other processors of the same model, for example, it's very indicative of it's relative processing power.

        Besides that, overclockers, speed demons, and wannabe's are going to want to have some concrete numbers to brag about.
    • Perhaps they would just use MIPS or something.. or some sort of benchmark. Often companies like Apple and Sun resort to this so their low clock values don't sound bad.

  • Never take off... (Score:4, Funny)

    by Octal ( 310 ) on Wednesday November 14, 2001 @03:54PM (#2565974) Homepage Journal
    Clockless chips will never take off. How are people supposed to draw incorrect conclusions about which chip is the fastest when there's no MHz/GHz rating?
    • Hmmm....

      That's easy! They just start using BogoMIPS as the model number!
    • Hmm. . .Benchmarks, maybe?

      This would actually be a good thing. Speeds will have to be advertised relative to their competitors, rather than a meaningless measurement.
      • Ok, I think we need a poll for this new benchmark name -

        o Gibson
        o Babbage
        o Turing
        o Stephenson
        o CowboyNeal

        I just want to see the look on a salemans face when he says this new processor is rated at 10 Giga CowboyNeals...
    • Easy enough. Go for a die size rating, or number of transistors. Even better, make up a number based on die size, chip size, voltage and number of bits, and use that as the standard.
      • I understand that benchmarks aren't the most reliable source of information, but even selling chips by bogomips would certainly be better than this. What you propose would be like talking about car motors and adressing EVERYTHING about them but their horsepower.
    • How about a Gram rating instead?
      Or rate the CPU by how noisy the fan is? (Athlon is superior here :)
    • no two 'identical' chips will run at the same rate - just like the overclockers people will fight over 'known good batch numbers'.



      Or more likely Intel (by then the only CPU company left of course) will start binning by actualy performance - look for "runs Win 95 fast enough", "runs NT fast enough" and the expensive "runs XP a bit" speed grades

  • AMD Wins. (Score:3, Funny)

    by Nikau ( 531995 ) on Wednesday November 14, 2001 @03:55PM (#2565988) Homepage
    In other news, AMD abandons all current R&D to work on clockless chips so they can win the clock-speed wars against Intel...
    • That doesn't even make sense. How is a 0 MHz clock "winning the clock-speed wars"?

      On the other hand, their chips would have INFINITE IPC ;-)

  • Duh! (Score:3, Funny)

    by chinton ( 151403 ) <.chinton001-slashdot. .at. .gmail.com.> on Wednesday November 14, 2001 @03:56PM (#2565994) Journal
    If there is no clock, how do they know that they are 3 times faster? :-D
    • Same way they compare computers with different clocks. Run benchmarks. Time how long a function takes and compare the results. Probably something like linpack.
    • Duh indeed. They would have to measure the speed relative to its predecessor or competitor while it is actually processing.
    • Duh! If you have 2 programs, with same stuff but different processers side by side and you run any type of benchmark you can see this. What you just asked was "How do you know a Pentium3 is faster then a 486?!?!" :-D
    • Just test how fast Photoshop filters take to run. :) "It's as fast as a stupercomputer!"
  • If your processor doesn't have a clock, how can you boast it runs at xxxx MHz ? how can you double the external clock, put a divider inside the CPU, and pretend your processor is twice as fast as your rivals' ?

    This is gonna be bad for business I tell you ...

    • They can just use things like millions of instructions per second (MIPS). That would at least be as meaningful as clock speed anyway, as far as benchmarking and what not.
    • Marketing just has to play up the clockless thing like it's the best ever. "Gigahertz, Schmigahertz"... "So fast it doesn't even need a clock"... etc.
    • MHz is a somewhat misleading term anyhow. 1 GHz on a G4 isn't the same as the same 1 GHz on a P3 core or K7... MHz can't be used as a sole number indicated the performance of the chip. You can see all this in Intel clocking their chip really quick but they are still beaten by slower AMD chips, which is why AMD changed their marketing scheme.

      What *should* happen, is everyone should argee on a standardized benchmark, which is OS & architecture independent, that would become the single number comparsion between two chips. Although, I highly doubt everyone would argree to such a single benchmark....
      • What *should* happen, is everyone should argee on a standardized benchmark, which is OS & architecture independent, that would become the single number comparsion between two chips. Although, I highly doubt everyone would argree to such a single benchmark.... The real problem, which (thankfully) is coming more and more out into the open, is that there is no way to meaningfully reduce today's complex general purpose CPUs to a single number, or even a small subset of numbers. Real performance is far too application dependant (and in some cases data dependant), meaning that the only truly useful benchmark for any application is to actually run the application in question. We're pretty much on the way to this already... gaming sites benchmark equipment based on how well/fast it runs a variety of common games using a variety of settings for example.

        Any quoted single number is reasonably meaningless.
        • You can see this if you compare various benchmarks [specbench.org] for different systems. The Sun Fire 280R has a CINT2000 of 375, and a CFP2000 of 324, the Fujitsu PRIMEPOWER400 (600MHz)has 390 and 314, so the Fujitsu has faster Integer performance, while the Sun has faster FP performance. Which one is faster in 'real life' depends on the mix found in your application.
  • 97, the results showed that the asynchronous chips were three times faster and consumed only half the power

    so....the reason they weren't used is because....of....what else....

    $$$$$

    (from marketing mhZ!)

    -k.
    • People have spent the past twenty plus years designing development tools for synchronous design. There's just a lot less groundwork covered for asychronous design because no one has spent the millions of dollars to create a (mostly) new tool chain.
      • People have spent the past twenty plus years designing development tools for synchronous design. There's just a lot less groundwork covered for asychronous design because no one has spent the millions of dollars to create a (mostly) new tool chain.

        Ditto tools for chip testing.

        Chip testing of synchronous designs is easy, and there are automated tools to do it.

        The common ones are based on fullscan or partial scan: You add a mux to each flop and use a test signal to string them into one or more shift registers. Pop into test mode, shift out the old state for examination and shift in a new state for the next steps of the test.

        You can change the function of the pins on the chip to shift out a bunch of little chains quickly, or use one or a few long chains and shift through the JTAG port (which is really intended for "boundary scan", where you switch the pin drivers into a simialr scan mode controlled by the 4- or 5-pin JTAG port, and toss signals from chip to chip to see if all the chips got soldered onto the board correctly).

        Scan works well on synchronous designs, where all the flops in each of several "clock domains" are clocked by a common signal. But in asynchronous designs, where each clock may be clocked by an arbitrary signal, this falls apart.

        There IS a methodology - complete with automatic test program tools - that can test asynchronous designs as easily as synchronous. It's called the "Cross-Check Array". But it was never widely deployed in the United States and the company that did it has since been merged into another and by now may be gone. As far as I know, only Sony (which got an unlimited license as part of investing in Cross Check when it was a startup) is the only big user of it these days.
    • Environmental tolerances, IIRC (and no, I didn't read the article yet). The last time I read about clockless computing, the chip stopped working if the temperature deviated more than 5K[elvin] in either direction.

    • Actually, I bet there would at least some marketing cachet associated with a "clockless" chip. Remember a decade ago when CD player DACs went from 16 bits to 18 or 20 bits, then suddenly the coolest thing going was a "1 bit" DAC (i.e., a delta modulator)? The buying public will tend to go for whatever marketing decides is trendy.

      The reason why asynchronous logic hasn't hit store shelves yet probably has to do more with implementational difficulties than marketing. I was taught synchronous logic design for my EE degree -- it's easier to design something when you know that results in remote parts of the chip are synchronized to the clock. When you looked at a timing plot for a circuit, it was usually pretty easy to debug because some parts of the circuit were clearly taking too long to execute their tasks -- and the solution was equally straightforward, decrease the clock speed. Designing for asynchronous circuits is probably much harder, since tentative results can screw things up. Furthermore, it's hard to imagine how some design techniques such as pipelining can work in an asynchronous environment.

      • Remember a decade ago when CD player DACs went from 16 bits to 18 or 20 bits, then suddenly the coolest thing going was a "1 bit" DAC (i.e., a delta modulator)? The buying public will tend to go for whatever marketing decides is trendy.

        Actually, 1 bit DAC is better because of a few good technical reasons (which I can't give a full treatment of here, as i don't know them too well. But I will discuss them anyway). The main reason is that they sound better. One of the big problems with n-bit DACs is that you need to make sure that it scales linearly without any jaggy bits along the way, else the sound quality suffers. The cool thing about 1bit DACs is that they don't have this problem - it's either active or not, and variations just make it louder or softer. Even better, you can use a 1 bit DAC at a few MHz to simulate a 16 bit DAC at 44KHz. This makes for a part that is easier to manufacture (no calibration), simpler, and sounds better.

  • An asyncronos chip will hit the highest speed automatically. An better cooler will acelerate your PC without adjusting any settings. Or if you just want a silent pc it wouldn't need a fan, it will just work slower.
    But I don't really think that chips that are completly asyncronos could be successfull, but there is a good possiblity that we will see hybrid chips with asyncronos and syncronos parts. Imagine a CPU with a fixed FSB but a asyncronos ALU.
  • When technology such as this exists why do companies not develop with it? Do they feel that they should save it down the road? No! Dont! Your slowing the progress of humanity. Imagine a chip six times faster then today's chips running at the same power for the same price? 12ghz! Imagine the computational power that would be available using the same resources we have today. Why waste the future companies, go with inovation, in this case it would of been worth it!
    AJ
  • Seems like there was a story about this earlier...

    Hmm.

    Oh! Here it is:

    Clockless Computing: The State Of The Art by timothy with 140 comments on 01-09-15 6:26

    Love,

    Ahem.

  • Old idea (Score:3, Informative)

    by Henry V .009 ( 518000 ) on Wednesday November 14, 2001 @04:03PM (#2566052) Journal
    Async processing is a very old idea. The problem is that designing the logic for it is a far greater chore than for regular chips. CPU designers are simply not good enough to do it well yet.

    • Re:Old idea (Score:4, Redundant)

      by Yobgod Ababua ( 68687 ) on Wednesday November 14, 2001 @04:28PM (#2566231)
      It's not even that they "aren't good enough", it's more a matter of inertia.

      Currently all the training, design tools, verification tools, etc, are geared towards solving the particular problems that come up through synchronous design. Asynchronous design avoids some of those problems completely, but has others of it's own.

      Major companies are unwilling to trade a known set of problems for an unknown set.

      When some of the small start-ups that are currently pursuing asynchronous chips release product and show that those problems can be practically and regularly solved then the world will sit up and take notice, but until then we're just another 'technological curiosity'.
      • Not only is it a matter of trading known problems for unknown ones, but it is a matter of trading problems on which a great deal of headway and investment has been made, for a new frontier where all that capital will be wasted. And not only that, but async is fundamentally harder to accomplish. Synchronos logic fits much better with our transistor technology.
  • If there are no numbers to prove it?

  • UltraSPARC-IIIi will have a bit of async logic (Score:5, Interesting)

    by ChrisRijk ( 1818 ) on Wednesday November 14, 2001 @04:05PM (#2566066)
    "How Sun swerved to avoid Rambus"
    http://www.theregister.co.uk/content/3/22279.html [theregister.co.uk]

    More details on the CPU:
    http://www.theregister.co.uk/content/3/22274.html [theregister.co.uk]

    Sun press release:
    Extends UltraSPARC III Chip Family Tree--First Use of Sun-Developed Asynchronous Logic Design in Chip's Memory Interface [sun.com]

    At Sun Labs:
    feature article [sun.com]
    async research home page [sun.com]

  • Comment removed (Score:4, Funny)

    by account_deleted ( 4530225 ) on Wednesday November 14, 2001 @04:05PM (#2566069)
    Comment removed based on user account deletion

  • Intel has never produced, nor have they discussed at any ISSCC or HotCHips forum a plan for an asynchronous design.

    Unless you can provide me with more detail, I think that statment is wrong.
    • If you read the article there's quite a bit of reference to various internal Intel projects. Maybe Intel just doesn't publicize every internal project they work on.

  • clockless (Score:4, Funny)

    by NeoTomba ( 462540 ) on Wednesday November 14, 2001 @04:08PM (#2566090) Homepage
    Clockless chips would result, perhaps, in the most interesting (funny?) marketing.

    Intel would develop a standard way of indicating performance. Based on something their particular chips are good at. We'll say they release the Pentium Clockless 1000, Pentium Clockless 2000 and Pentium Clockless 3000.

    AMD would, if trends indicate anything, market them using performance ratings. Instead of deciding performance based on the intel standard, they would have new names to indicate that their processors, in some situations, are faster than their Intel counterparts. They'd probably be called the AMD Athlon Clockless XP 1100+, and so on.

    In response, Intel would start releasing worse processors, but with higher numbers. Pentium Clockless II 5000 would be their flagship.

    AMD would continue making their processors in the traditional manner, but would adopt a new naming mechanism. AMD Ahtlon Clockless Performance XP Super Fantastic 6000, maybe.

    Repeat ad nauseum.

    -NeoTomba

    • Re:clockless (Score:3, Interesting)

      by Sycraft-fu ( 314770 )
      No different than how graphics cards are released now. Yes, they actually have clock speeds, the most important being core and memory, but they aren't really marketed that way. Their names are artificial, ie GeForce Ti 500 ATi Radeon 8500, and the companies generally emphize the pretty sounding names for things like pixel shaders rather than talking about speed of the chip.
  • It is muy hard to design a chip without a clock. Speed gains would probably be offset by the time it would take to design the chip, given the rate which clock speeds advance.

  • The main problem. (Score:5, Interesting)

    by aspillai ( 86002 ) on Wednesday November 14, 2001 @04:09PM (#2566103) Homepage
    The main problem with async. design is the asycnchronous part of it. In a typical computer, you have tons of parts that you use interchangably. These parts have operate at different speeds. How would two devices working at different speeds operate smoothly. Generally, this is very hard. But the thing is they can: But the devices themselves need to agree on a few things. But async. design is higly complicated because in a clockless environment you have to pretty much garauntee something like "I'll do this within 2 equivalent clock cycle." or have other types of signalling negotiation. You can't clock on a "clock" to do stuff. You have to clock on a "async" signal.

    This is the problem in the large. When you go down to the chip level, there are tons of nightmares. There can be feedback loops causing race conditions that only occur at certain times. There are load problems that might increase complexity so much more than equivalent problems in a clocked design. Clocked design makes things a lot simpler and still designing a chip is extremely diffucult.

    But the future I don't think is in clockless design, but "careful clock" design. For example, there are chips which are smart enough to disable sending the clock to certain part of a chip when it knows those parts will never be used. That saves a lot of power. There are chips which aim to spread the clock around carefully thus increasing the speed. And remember, almost 50% of the power in a chip is lost due to the wiring!

    me.

    • Re:The main problem. (Score:2, Informative)

      by Link310 ( 453668 )
      The "clocking" is not an issue in clockless computers. The idea becomes a handshake signal between components. These tell relevant components that the data is ready to be processed at the next stage. When both components agree that they're ready to go, stuff happens. This happens without the other components needing to know.

    • For the uninitiated (Score:2, Informative)

      by superflex ( 318432 )
      Race condition - An aspect of asynchronous sequential logic design. When a change in input causes two or more flipflops (latches) to change state. This is a race.

      This change in input creates instability in the system, as all logic elements affected by the input change undergo state transitions. If the resulting stable state at the output end of the logic block is the same no matter what, it's a noncritical race. However, in some cases the output can settle in different stable states depending on the order of the flipflop state transitions within the circuit. This is called a critical race, and it is a bad thing.

      Critical races mean we can't predict what the output of a circuit will be given an initial state and an input value. Therefore, the circuit is worthless.

      • This can easily be overcome by gating the input to a logic stage with a handshaking signal from the stages that are inputs to it.

        Instead of thinking of this as being clockless, think of it as being dynamically clocked. Instead of clocking operations at a fixed frequency, you just gate them based on how long they take to perform. This presents an enormous performance benefit because you don't have to slow the entire chip down to the speed of the slowest portion of the chip.

        An analogy is polling v. interupts. Instead of polling for something to happen at a fixed frequency, you can go about your business until whatever you were waiting on taps you on the shoulder and says "I'm done". In both cases, you don't have to worry about metastability, as you still have a gating factor to keep things under control.
  • ...chips work very much faster...

    ...Intel hade some experiments...

    Unfortunately, these chips only seem to have half the spell-check and grammar-check capability.

  • Good and bad (Score:3, Interesting)

    by crow ( 16139 ) on Wednesday November 14, 2001 @04:11PM (#2566110) Homepage Journal
    As I understand it, traditional systems use a clock signal to let each stage of the pipeline know when the previous stage has completed. Each stage is designed to have few enough transisters that a signal has to pass through to guarantee that it will be done by the time the next clock signal arrives. Clockless systems instead design the processor such that at each step in the processing, the difference between a partial result and a completed result is self-evident. This requires more work, both in the design of the processor and in terms of transisters, but at the benefit of eliminating the clock (and many associated transisters) and any waiting between when the processor has completed a step and when the clock signal arrives.

    Since dealing with the clock signal has become increasingly complex, instead dealing with not having one is becoming a more reasonable solution.
  • if that's the case, i'll never have to worry about my state machine taking an extra delay going from one state to the other...

    or the problems with single extra delays when synchronizing blocks between requests and acknowledges...

    reminds me of the ease of doing everything in software...

    obviously it would be interesting in how things would be done on the synthesis side of things...

    there will always be blocks that will have clocks especially in the registers as such. blocks that are so called asynchronous maybe called that if the triggering line may not be the clock line, but it's still sensitive to something else.

    ie, you may have a d flip flop which would latch out its data on the enable "event" (which is attached to the clk line)

    it's easy to say "oh we'll have our complete design asynchronous" but complete design? until someone show us one first... it's pretty difficult. and it's nothing revolutionary here....
  • The article mentions the year -97. Perhaps this is a typo, but I kind of like the idea of using negative years for those before 2000 so that you'd subtract 2000 from a year, but that would make 1997 be year -3 not -97.

    --Ben
  • "You cannot increase the clock speed, for that is impossible. You must first realize, there is not clock."
    -- Funky bald kid holding a processor and talking to Neo.

  • Oh please (Score:2, Redundant)

    by Dirtside ( 91468 )
    Slashdot is SO behind. Kuro5hin had a story about this back in -96, right after the tests were done! Leave it to /. to wait 2,098 years to post a story. Sheesh.

  • The One. (Score:2, Funny)

    by atathert ( 127489 )
    Do not try to beat the Clock, for that is impossible. Only try to realize the truth.


    The truth?


    There is no clock.

  • Wind it too hard and it runs three times as fast and consumes less power!

  • Intel tried this, and created a chip that was Pentium compatible, but ran three times faster than conventional processors, consuming half the power. It never made it out of the labs, though.

    Now, imagine such a processor made today, and marketed towards geeks! It'll be the cool thing to have.

    • Heh. This sounds like the car that my, uh, friend's uncle (who of course, uh, works for Ford) has that gets 150 miles per gallon and runs on peanut oil. I swear. :)

      I can't remember any of those other "super-tech" urban legends now...

  • The IBM Power4 architecture uses a "Wavepipelined" interconnect bus. This is a clockless bus. I believe the Alpha 21384 was going to use this as well.

    Too bad IBM won't sell the chips. They only sell the servers. Each die has 170 million transistors with 2 microprocessors per die! They package 4 dies in one package totaling 710 million transistors.

    It kicks the snot out of anything Intel or AMD has.

    Initial benchmarks show the SPECINT2000 and
    SPECFP2000 at 808 and 1169 are comfortably ahead of the competition (2GHz Pentium IV was the SPECINT leader at 656, while Alpha 21264 @833MHz was SPECFP leader at 777).

    Anybody have $450,000 to spare?

    http://www-1.ibm.com/servers/eserver/pseries/har dw are/datactr/p690.html
  • So we could have the IBM linux watch made with clockless chips :-)

    --
    Chuchi
  • I can't wait to see all of the timing errors that will pop up in software due to this. The defect reports due to race conditions alone will fill up Gigs of storage. Not to mention that systems will be as individual as fingerprints! Hours of debugging fun!!!
    • WTF? Just because a processor uses async logic at the low level has no particular impact on "timing errors" in an OS kernel, or any other OS layer. Synchronization of action in modern systems, depending on your usage, either depends on the atomicity of memory accesses (either direct or aided by special processor instructions such as compare-and-swap, etc.) or else refers to syncronization through an (asynchronous!) event such as an interrupt. If your code someone depends that seriously on instruction/pipeline timing, you'd be screwed by any number of other fairly mundane CPU or source code changes.
  • I truly hate to post this, but why is that the highest mod'd topics are funny? I mean how funny is the megahertz=marketing joke? I for one was hoping for a little more of a techie response by readers so that someone, like myself, could come to understand this concept little better, and it seems a little sad, that the most informational reply is only at +2.

    Oh well

  • Fant additionally proposes replacing the conventional system of digital logic with what he calls "null convention logic," a scheme that identifies not only "yes" and "no," but also "no answer yet"

    This brings to mind the Ternary Computing [slashdot.org] article back in October.

  • ARM's AMULET....(credit where it's due please) (Score:3, Insightful)

    by BLAG-blast ( 302533 ) on Wednesday November 14, 2001 @04:33PM (#2566287)
    Well, just when you think you've seen something new, then you release that ARM did five years before... Check out the AMULET [man.ac.uk], it's been around since 1990 (in design) and then became the worlds first commercial asynchronous microprocessor in 1994.

    Of course I'm used to things getting published a little late on slashdot ;-)

  • that don't make sense: (from the article)
    A chip without a clock would be about as useful as a page of text without any space between the letters

    Actually, it's about as useful as a page of text that only exists when you have your eyes closed.
  • alot has been done on clockless

    what it requires is a great understanding and stringent design

    these are the reason why intel did IA64 non specultive

    have a look at IBM's report in IA64 in the microprocessor report (they give good reasons why its doomed however clever people think it is)

    amulet spun out of manchester and a stanford spin out company also started up

    not exactly new new thing

    only can be done in small teams with very trained people

    but hey they got a clockless ARM running a long time ago

    regards

    john jones
  • we saw this article [slashdot.org] sept 15.
  • I think interdata made/sold a relatively large number of async computers back in the 1970's.
  • Sure, in theory they are possible, and tests have been done on some types of circuit.. but to claim 'asynchronous chips are smaller, take less power, and are 3x faster' is kind of silly.. if this is the case, where are the chips?
    • Read the article. Intel already made an async Pentium-compatible back in '97 - which was 3x faster & used less power.

      They scrapped the project because they felt it'd take so long to develop & improve the technology that clocked designs would overtake it anyway, by the time it was ready.

  • It's too bad to see such an interesting subject butchered by someone so lacking in technical knowledge. The entire article felt like a compilation of Comdex marketing brochures. Check this out:

    From that first choice came the steamroller effect of Moore's Law, wherein nearly all research, development and production in the semiconductor industry has focused on clocked chips

    Yeah, that made sense... Maybe she was thinking of "Murphy's Law"

  • Since Transmeta is already a bit off the deep end and is known for energy-saving Intel compatible CPU's it seems to me it'd be good for them to partner with one of these async companies and work on a chip that incorporates both their ideas. Because Transmeta CPU's use less hardware they'd seem to me to be easier to reimplement in this manner and because of their code morphing concept they can still be Intel compat. Because of both the code morphing and the async design they'd run with less energy and less heat and because of the async design they'd be faster than Intel. (well even if it took long enough to get to market they'd still be pretty fast.. and very good for rack mounted machines and laptops)

  • Why asycronous computing? (Score:3, Insightful)

    by Fucky Badger ( 535691 ) on Wednesday November 14, 2001 @07:32PM (#2566776)
    There are some compelling reasons:

    Though synchronous design has enabled great strides to be taken in the design and performance of computers, there is evidence that it is beginning to hit some fundamental limitations. A circuit can only operate synchronously if all parts of it see the clock at the same time, at least to a reasonable approximation. However clocks are electrical signals, and when they propagate down wires they are subject to the same delays as other signals. If the delay to particular part of the circuit takes a significant part of a clock cycle-time, that part of the circuit cannot be viewed as being in step with other parts.

    For some time now it has been difficult to sustain the synchronous framework from chip to chip at maximum clock rates. On-chip phase-locked loops help compensate for chip-to-chip tolerances, but above about 50MHz even this isn't enough.

    Building the complete CPU on a single chip avoids inter-chip skew, as the highest clock rates are only used for processor-MMU-cache transactions. However, even on a single chip, clock skew is becoming a problem. High-performance processors must dedicate increasing proportions of their silicon area to the clock drivers to achieve acceptable skew, and clearly there is a limit to how much further this proportion can increase. Electrical signals travel on chips at a fraction of the speed of light; as the tracks get thinner, the chips get bigger and the clocks get faster, the skew problem gets worse. Perhaps the clock could be injected optically to avoid the wire delays, but the signals which are issued as a result of the clock still have to propagate along wires in time for the next pulse, so a similar problem remains.

    Even more urgent than the physical limitation of clock distribution is the problem of heat. CMOS is a good technology for low power as gates only dissipate energy when they are switching. Normally this should correspond to the gate doing useful work, but unfortunately in a synchronous circuit this is not always the case. Many gates switch because they are connected to the clock, not because they have new inputs to process. The biggest gate of all is the clock driver, and it must switch all the time to provide the timing reference even if only a small part of the chip has anything useful to do. Often it will switch when none of the chip has anything to do, because stopping and starting a high-speed clock is not easy.

    Early CMOS devices were very low power, but as process rules have shrunk CMOS has become faster and denser, and today's high-performance CMOS processors can dissipate 20 or 30 watts. Furthermore there is evidence that the trend towards higher power will continue. Process rules have at least another order of magnitude to shrink, leading directly to two orders of magnitude increase in dissipation for a maximum performance chip. (The power for a given function and performance is reduced by process shrinking, but the smaller capacitances allow the clock rate to increase. A typical function therefore delivers more performance at the same power. However you can get more functions onto a single chip, so the total chip power goes up.) Whilst a reduction in the power supply voltage helps reduce the dissipation (by a factor of 3 for 3 Volt operation and a factor of 6 for 2 Volt operation, relative to a 5 Volt norm in both cases), the end result is still a chip with an increasing thermal problem. Processors which dissipate several hundred watts are clearly no use in battery powered equipment, and even on the desktop they impose difficulties because they require water cooling or similar costly heat-removal technology.

    As feature sizes reduce and chips encompass more functionality it is likely that the average proportion of the chip which is doing something useful at any time will shrink. Therefore the global clock is becoming increasingly inefficient.
    • Hey moderators, did it ever occur to you that this post was just a little suspect? So nicely formatted, with no spelling or grammar errors at all. If you look at the poster's previous comments, this one tends to stand out.

      A quick look on Goolge show that this guy is a karma whore [man.ac.uk]

  • Clockless, or asynchronous, chips work very much faster and consume less power than their synchronous equivalents...

    Well, yeah! Look at any electronics book where they have an ALU (Arithmetic Logic Unit). You can perform whatever integer operations the unit supports in almost no time flat. It all works with so-called logic gates that are cleverly arranged in the unit. There is no need for a clock. You just spill the bits on one end of the thing and the results come flying out the other side after whatever the thing's propogation delay is. Which isn't very long. (I don't have a reference book handy right now so I can't tell you exactly.) Oh yeah, and this "technology" has been around since the invention of the transistor.

    So why do we need a clock in a microprocessor? Because there are a zillion other operations going on, and it's really hard to make a system as complicated as a computer (millions of transistors, eh?) that operates asynchronously without messing things up. (With that much circuitry, it's a miracle the things work at all.) So they put a clock on the thing. The real arithmetic still happens in no time flat, but then it sits there waiting for the clock pulse to come around and allow the results through. It's really amazing shit. And I don't even know jack about 'lectronics.

    But I was going to say something, and I forgot what it was. Oh well. Maybe I'll remember later. I really hate when that happens though. Oh well.

  • What do I adjust? Sheesh.

    Still, if it runs at whatever speed it can, I suppose it'll speed up automatically when I cool it, and slow down when it overheats. Wonder if this will eliminate burnt-out chips... riskless overclocking for the masses. Maybe I should buy shares in heatsink/fan manufacturers :-)

    This is also going to make consistent benchmarking a thing of the past. You'll never get the same run twice on the same chip, let alone different chips in different environments.

  • Whenever the question of asynchronous chip design comes up, everyone points out the Intel work in '97, but nobody mentions the work done by the AMULET group [man.ac.uk] in Manchester. Set up in 1990 they produced the world's first asynchronous chip in 1994, based on the ARM chipset. By the time Intel got their act in order, the second generation AMULET2e had arrived, providing higher performance than a synchronous ARM chip for the same power input.

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