Elevation Plays a Role In Memory Error Rates 190
alphadogg writes "With memory, as with real estate, location matters. A group of researchers from AMD and the Department of Energy's Los Alamos National Laboratory have found that the altitude at which SRAM resides can influence how many random errors the memory produces. In a field study of two high-performance computers, the researchers found that L2 and L3 caches had more transient errors on the supercomputer located at a higher altitude, compared with the one closer to sea level. They attributed the disparity largely to lower air pressure and higher cosmic ray-induced neutron strikes. Strangely, higher elevation even led to more errors within a rack of servers, the researchers found. Their tests showed that memory modules on the top of a server rack had 20 percent more transient errors than those closer to the bottom of the rack. However, it's not clear what causes this smaller-scale effect."
Fusion IO? (Score:4, Interesting)
Re:Heat related? (Score:4, Interesting)
Vibration as well. The top of the stack moves quite a bit more than the bottom of the stack, even though the overall magnitude of the movement is small.
Re:Heat related? (Score:5, Interesting)
Radiation blockage is mostly a function of mass the rays have to go through. The vast majority of cosmic rays are blocked by the 14 pounds per square inch/100 kilopascals of air above us. That means that a square inch of ground at sea level has 14 pounds of air above it. A square inch section of a rack above you would probably be in the pounds as well, and would block a good portion.
Re:Heat related? (Score:5, Interesting)
I was looking into RAM error rates a week or so ago. There's not a lot of research around, but I recall seeing suggestions that error rates were significantly smaller if the chips were mounted vertically rather than horizontally - because vertically mounted chips present a lower vertical cross-section and most error-inducing cosmic rays come at near-vertical inclination.