EUV Chipmaking Inches Forward 32
szotz writes "You've got falling droplets of molten tin, bright lasers, and fancy evacuated optics. What's not to love about EUV light sources? The fact that we still don't have them in production lines producing chips. Light source maker ASML says it's 'more confident' that the technology's on track now, and that the machines should meet their target brightness by 2015, in time to help pattern the 10nm generation of chips — the next next generation. We'll see. Or then again maybe we won't. The light's outside the visible range."
Re:Outside the visible range?!? (Score:2, Informative)
You'll be find as long as you stay out of the machines in a chip fab.
EUV source (Score:4, Informative)
I was at SPIE in San Jose in 2011 and they had a few of the demo EUV light sources on the convention floor. It looked like it was out of the Hellraiser films. I can only imagine how large (and evil looking) something capable of doing 125 300mm wafers per hour will be.
All joking aside, there are still huge obstacles to overcome for EUV. The line edge roughness issue may be a show stopper for nodes beyond 10nm as the chemistry of the diffusion lengths of the photo-activated compounds of the resist is close to this feature size and can add a significant variance to the CD of the lines. Also cost is going to be a major question, last I heard the "pre-production" tools are going for 130 million a piece and the reticle sets are going to be getting into millions of dollars (if not 10 Million). So if its cheaper to buy a bunch of E-beam tools and/or a bunch of 193nm immersion tools (for triple patterning) the EUV may never make economic sense for fabs.
Here's a more informative link (Score:5, Informative)
Actually explains the process in detail:
http://spectrum.ieee.org/semiconductors/design/plans-for-nextgen-chips-imperiled [ieee.org]
BTW, it's considered good practice in anything related to scientific research to define acronyms the first time they are used. In this case, EUV == extreme ultraviolet
Re:Outside the visible range?!? (Score:3, Informative)
Re:EUV source (Score:5, Informative)
"a bunch of 193nm immersion tools (for triple patterning) the EUV may never make economic sense for fabs."
A problem with dual/triple patterning is that it is mostly suitable for making parallel lines, not complex patterns. It happens that this works very well for NAND memory, but for CPUs, not so much.
Another problem is that you need 2x or 3x the number of process steps, which puts the higher price for EUV machines into perspective.
I expect that the primary target at the moment is to develop the technology. Once we're there, more attention can go to reducing costs.
Disclosure: I work at ASML on the EUV source. But this are my own views; I don't officially represent the company.