High-Performance Monolithic Graphene Transistors Created 99
MrSeb writes "Hardly a day goes by without a top-level research group announcing some kind of graphene-related breakthrough, but this one's a biggy: Researchers at the University of Erlangen-Nuremberg, Germany have created high-performance monolithic graphene transistors using a simple lithographic etching process. This could be the missing step that finally paves the way to post-silicon electronics. In theory, according to early demos from the likes of IBM and UCLA, graphene transistors should be capable of switching at speeds between 100GHz and a few terahertz. The problem is, graphene doesn't have a bandgap — it isn't a natural semiconductor, like silicon — and so it is proving very hard to build transistors out of the stuff. Until now! The researchers say that current performance "corresponds well with textbook predictions for the cutoff frequency of a metal-semiconductor field-effect transistor," but they also point out that very simple changes could increase performance 'by a factor of ~30.'"
Re:graphene vs post-silicon (Score:4, Informative)
they for example solved the problem of graphene to always need some current? Being able to build ultra-fast chips is nice, but if there is no way to reduce power usage of parts currently usused
Many algorithms are serial. A few thousand terahertz transistors might be just enough for them. And if such an algorithm needs a lot of data, a silicone memory around might be sufficient as well.
If you have a terahertz transistor, it will very likely find an application in computing, even if it would use 1mW when being idle.
Re:Something missing in the explanation (Score:5, Informative)
I read the article (I know it's not considered good form here on Slashdot), and there seems to be a discrepancy: this is described as being a graphene transistor, but the gate uses silicon carbide as the semiconductor. So it seems like a better description would be a hybrid graphene/semiconductor transistor. Is this correct?
If it is a hybrid then what are the limitations and how is it better then current all semiconductor circuits? As far as I know (not very much) there is no reason to build silicon carbide integrated circuits, so why would anyone want to use SIC with graphene? Is this a step to something more useful?
I'm not trolling, I just want to get a better understanding.
Yes. They have only used graphene for the gates and contacts, not the channel itself, so a hybrid graphene/SiC transistor would probably be a better description.
As for advantages over existing technology: as far as I know the switching speed is dependent on the channel material, NOT the gate etc. So these transistors will (afaik) be no faster than a normal SiC transistor. All the hyperbole about graphene transistors being is only in the linked news article and not in the paper. In fact the final conclusion of the paper is:
The concept's particular strength, however, lies in the following property: within the same processing steps, many epitaxial graphene transistors can be connected by graphene strip lines along with graphene resistors and graphene/SiC Schottky diodes, and therefore complex circuits can be built up. As a special feature of graphene in contrast to semiconductors, we anticipate that even a complete logic is feasible.
On the other hand this is still interesting for other reasons:
1) They have demonstrated large scale integration of graphene. If we can get a bandgap in graphene without sacrificing too much mobility then combined with this kind of work we have a complete graphene chip.
2) Another thing they emphasise in the paper is the simplicity of the lithography process. Simpler lithography means it's easier to go smaller. Smaller features = better chips.
TL;DR - the news article is bullshit, the real result is interesting but not revolutionary (yet).
Re:Something missing in the explanation (Score:5, Informative)
Firstly, why is graphene "faster". This is mainly due to the large mobility [wikipedia.org] of electrons and holes in the material. Furthermore, (I'm not sure here) the fact that the channel is only 1 atom thick, means that switching the transistor from one state to the other should be very fast [nature.com].
With graphene, the problem is the lack of a band gap. This means that there is always a current flowing through the device no matter which state it's in (on or off, corresponding to 1 or 0). This is a major drawback if you want to make digital transistors out of them, because the device will always draw power no matter what. Ideally you would want the device to have zero or close to zero current flowing through it in one state and have current flow in the other state. So in order to make a power efficient "digital" transistor from graphene you would need to somehow induce a band gap in the material. There are various ways to do this but none have provided the "breakthrough" the summary mentions.
In some cases graphene transistors could be used, for example analog devices, where the above mentioned issues are not problems. This is the case of the 100 GHz transistors that the article mentions.
The issue of dissipating heat should be quite different in the case of graphene, because of the materials very good heat transport properties.
Link to article (nature paper) (Score:3, Informative)
http://www.nature.com/ncomms/journal/v3/n7/full/ncomms1955.html
It's open access (free).
Why the hell does this get linked to "extreme tech" instead of the realFA?
Re:BRING BACK FILE CONTROL BLOCKS !! (Score:4, Informative)
Now I feel old.
Re:graphene vs post-silicon (Score:2, Informative)
Re:Hype ? (Score:4, Informative)
Of course the characteristics that matter depend on the application. For a processor, fast switching is desirable, with low leakage in the off state, a low saturated resistance in the on state, low input capacitance, low capacitance from the output to the input etc. Additionally when there are devices in series across the supply, the characteristics should be such that a spike of current is avoided during switching.
The input capacitance is important since it takes current to charge and discharge it, increasing the drive power requirements as the operating frequency rises.
The nature of the input/output transfer function between on and off is very important to linear applications, such as audio, instrumentation, r.f. receiver circuits, linear r.f. power amplifiers etc. Low noise characteristics may also be sought. Those things are important to wireless communications and networking.
In power applications, things like the temperature coefficient of the saturated on resistance become important. Devices with a positive temperature coefficient may have potential problems with thermal runaway since losses and heat then boost each other. When building power devices, shifts in saturated on resistance, switching threshold, and gain with temperature are all important. If a portion of the transistor tends to draw more current when heated, the portion of the chip that conducts first, or that which has the least effective cooling, may tend to hog a disproportionate amount of the current, further increasing the temperature at the hotter spot. The safely handled power level is reduced when the current density is less uniform. Those sorts of characteristics make some existing types of power FETs that are fine for switching more failure prone in something like a linear audio power amplifier. When geometries are very small and current densities are high, metal migration from interconnects may occur possibly leading to eventual failure.
The effective thermal resistance is also important. Like electrical resistance which develops a voltage drop (or rise if you prefer) when current flows, thermal resistance develops a temperature rise with heat flow. Usually expressed units of temperature rise in degrees C per Watt, the junction to package surface, package surface to heatsink (pad), and heatsink to ambient thermal resistances are additive. The temperature rise across those combined resistances must be such that a maximum safe junction temperature is not exceeded. The heatsink to ambient thermal resistance can be reduced with a fan, but if thermal conductivity within the chip/package is poor, power handling ability is less than it would be otherwise. It's usually more difficult to achieve low thermal resistance with faster devices since they're generally smaller. A low speed power transistor with a large chip generally has lower thermal resistance than a fast one with a small chip. (smaller may reduce carrier transit times and capacitance). Of course smaller transistors usually reduce cost since more can be produced in a given size die, but process costs and yield are also factors. (and licensing fees?)
From the above it should be apparent that developing optimal devices for a given application is an involved art. It will be interesting to see which devices can see improved performance from use of graphene technology.
Marketing-speak tends to lie or at least mislead. Although the amount to data to/from memory goes up when the path gets wider, that iisn't increasing the rates the individual data lines are clocked at. So while it is reasonable to talk of so many gigabits per second memory bandwidth, it's isn't a memory clock in the GHz. When the data path got wider, some multiplied the frequency of the memory clock by the path multiplier to inflate the advertised number, but the signals are still at a few hundred MHz, not those high numbers. And even then, if wait states are needed, the effective memory clock is much less yet. Usually only a small amount of cache runs at high spee
Re:clock skew? (Score:5, Informative)
To avoid clock skew, you regenerate the clock. You can use a phase locked loop to sync to another clock, and generate a new clock signal synced with this clock but with an adjustment to the phase.
The FPGA that I use has methods for dealing with clock skew, the Xilinx app note describes how you can deal with it:
http://www.xilinx.com/support/documentation/application_notes/xapp462.pdf [xilinx.com] ...see from page 26 "Clock skew, the performance thief" and "Make it go away!"
Presumably when an ASIC has a similar problem, a similar approach is taken. (Disclaimer: I have zero experience with ASICs).
Re:Something missing in the explanation (Score:3, Informative)
Actually what you want is for zero current to be flowing in one state, and zero current to be flowing in the other state, too. That's the idea behind CMOS, which apart from leakage current, current only ever flows* during the transistion from one state to the other (because while it's transitioning, both N and P channel transistors will be conducting to some degree).
* (Current may well flow in the quiescent state, if the device is being used as a switch for something through which current flows, such as an LED).
Re:graphene vs post-silicon (Score:4, Informative)
It's a SiC MESFET with graphene gate. It's interesting in that the SiC is the source of C for the graphene, and they use two different growth methods to form a schottky barrier contact for the gate and an ohmic contact for the source and drain. But that's all the graphene is doing is making contacts. Maybe these are really good contacts, but it will still be limited in performance in terms of the gate length and SiC channel material parameters, which are actually pretty good but it's not a graphene transistor at all.
These hype articles about Graphene fail to mention that conventional highly scaled CMOS processes have cutoff frequencies in the 100's of GHz already, but that's not a metric that relates well to the clock speed of a large digital chip, although it helps. Other very important factors include how tightly you can pack things, getting low-resistance low-capacitance interconnet, and managing FET to FET variability over millions/billions of transistors. These latter factors have a bigger impact on clock speed than the transistors themselves.
I haven't read much of the latest on graphene transistors but the last ones I saw didn't come close to state of the art silicon, and their off-state current is very high because of the bandgap issue. You can make a bandgap in various ways such as sandwiching the graphene in various materials or making it into small strips but these tend to reduce the high mobility that made graphene so fascinating. I'm sure we'll see some interesting stuff come out of it but most of the press on graphene is the hype that researchers have to do to get funding.