New Manufacturing Technology Enables Vertical 3D Transistors 75
MrSeb writes "Applied Materials has taken the wraps off a new etching system meant to turn vertically stacked, three-dimensional transistors from lab experiments into commercial reality. The new Centura Avatar solves multiple problems facing manufacturers who are interested in 3D NAND but find their current equipment not up to the task of actually building it. According to the folks at Applied Materials, trying to build 3D NAND structures in real life would be like trying to dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart, through interleaved rock strata — and that's before we discuss gate trenches or the staircases. While this machine specifically targets 3D NAND today, a number of the challenges to scaling flash memory apply to scaling CPU logic as well. As for when 3D chips will be available for commercial purchase, Applied Materials was vague on that point, but personally I would expect to see companies adopting the new etch equipment in the next few years."
Pleonasm at twelve o'clock.... (Score:4, Insightful)
There's two semantic goofs in this submission, one in the title and the other in the first sentence, and neither was noticed or corrected by Soulskill. The phrase "vertical 3D transistors" is misleading, since a literal interpretation doesn't describe z-axis stacking and instead describes objects whose most significant dimension is oriented vertically; it would be more accurate to write "stacked 3D transistors". In the first sentence, the adjective phrase "vertically stacked" is certainly a pleonasm if there ever was one; the definition of "stacked" already describes a z-axis or "vertical" state. The use of the word "vertical" in both of those instances is ineffective semantics.
Re:wait wut? (Score:5, Insightful)
Re:Only Two Questions: (Score:3, Insightful)
I would think this tech will come sooner, and while expensive, it should also increase performance while increasing density. Shorter traces = faster signals and less problems trying to coordinate synchronization between multiple paths since the difference between longest and shortest traces is reduced.