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Intel Hardware

Intel Dismisses 'x86 Tax', Sees No Future For ARM 406

MrSeb writes "In an interview with ExtremeTech, Mike Bell — Intel's new mobile chief, previously of Apple and Palm — has completely dismissed the decades-old theory that x86 is less power efficient than ARM. 'There is nothing in the instruction set that is more or less energy efficient than any other instruction set,' Bell says. 'I see no data that supports the claims that ARM is more efficient.' The interview also covers Intel's inherent tech advantage over ARM and the foundries ('There are very few companies on Earth who have the capabilities we've talked about, and going forward I don't think anyone will be able to match us' Bell says), the age-old argument that Intel can't compete on price, and whether Apple will eventually move its iOS products from ARM to x86, just like it moved its Macs from Power to x86 in 2005."
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Intel Dismisses 'x86 Tax', Sees No Future For ARM

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  • by girlintraining ( 1395911 ) on Thursday June 14, 2012 @10:08PM (#40331149)

    You know, we had the same argument with RISC versus CISC architecture. And we know who lost that one. Badly. And the reason for that is because the bandwidth outside the processor, the I/O, is so damnably slow compared to what's possible on the die itself. That's why the data transfers to and from the CPU are only about 1/30th or less the speed at which the CPU runs internally. The only logical course of action is to do as much as you can on each byte of data coming off the bus as you can. Besides, look at Nvidia's GPU cores: They throw hundreds of cores onto the die, but it eats hundreds of watts as well. Massively parallel and simple instruction sets don't appear to translate into energy savings.

  • by Anonymous Coward on Thursday June 14, 2012 @10:27PM (#40331265)

    In terms of market share CISC isn't even close to touching RISC. Every ARM processor is RISC. It's not just smartphones and tablets you need to consider, but PMPs, consumer routers, and an unfathomable number of other devices that all use ARM (Advanced RISC Machine, previously Acorn RISC Machine).

  • by Chas ( 5144 ) on Thursday June 14, 2012 @10:35PM (#40331303) Homepage Journal

    Intel won the CPU wars because of manufacturing, not because of a superior instruction set.

    There's nothing inherently "superior" about ARM or PPC instruction sets.

    Each has its strengths and weaknesses and prescribed methods of capitalizing on the former while working around the latter.

    Is x86, possibly, more inelegant than ARM or PPC? Maybe. Then again, what exactly is so elegant about a "catch all" platform where the basic processor architecture can change wildly between manufacturers, leading one to require many "flavors" of code simply to cover multiple vendor platforms?

    x86 may be ugly and hackish. But it's probably THE best documented platform in history and has very VERY few platform segregation points.

  • by Darinbob ( 1142669 ) on Thursday June 14, 2012 @10:59PM (#40331411)

    Power-wise the argument is right. There's very little difference between the two instruction sets that makes one more power efficient than the other. However in practice the difference is that most Intel x86 family chips are optimized for high performance (desktop) where as most ARM chips are optimized for cost and efficiency (low power embedded systems, phones, etc). ARM probably has more experience in the chip design in making things smaller but as it ramps up into faster desktop or tablet oriented CPUs it is going to lose out more.

    It really does come down to software ultimately I think. Software needs to do minimal work if it wants to save power; stop checking the net every minute to see if there's an update, put the CPU to sleep when not in use, use interrupts instead of polling, do more in a compiled low level language and less in a byte code interpreted language or scripting language, keep things small, and don't let Microsoft touch you. As soon as you start demanding the ability to run MS Office then you are giving up on power savings.

  • Re:He's mostly right (Score:3, Interesting)

    by Anonymous Coward on Thursday June 14, 2012 @11:19PM (#40331499)

    Phoronix just did an article on 6 clustered Panda boards (Cortex A9) [phoronix.com] VS the other guys. It's worth a read.

  • by yakovlev ( 210738 ) on Thursday June 14, 2012 @11:27PM (#40331533) Homepage
    For a "modern" CPU the instruction decoder is an absurdly tiny part. This is because the branch prediction, caches, issue queue, regfiles, etc. are all much larger or at least the same size.

    This isn't nearly so true in a super-low-power mobile design. The instruction decoder size for a given instruction set architecture is pretty much a fixed size per decode pipe. This means that in one of these tiny mobile chips the relative size of the decoders is dramatically larger. A super-low-power chip dramatically reduces the sizes of the caches and branch prediction, reduces the size of the regfiles, and often eliminates the issue queue. It probably also removes a decode pipe, but the relative reduction in decode size is much smaller than the relative size reduction in other areas.

    The limited register set absolutely hurts x86 on power usage, perhaps more than the decoders do, since it forces more data cache accesses for register spills and fills.

    Now, I'm not saying that x86 is necessarily worse than arm on power usage, as the richer instruction set may have other advantages such as reducing instruction cache miss rate which can be used to improve IPC which can be spent to lower frequency and reduce power. Also, microcoded instructions may turn out to be more power efficient because they don't have to access the instruction cache every cycle.

    None of this considers the fact that Intel has the best fab technology in the world. This means their processors will be a generation more efficient than everyone else's, which is probably more than enough to counter any "x86 tax" which the instruction set incurs.
  • Comment removed (Score:5, Interesting)

    by account_deleted ( 4530225 ) on Thursday June 14, 2012 @11:50PM (#40331633)
    Comment removed based on user account deletion
  • Caveat lector (Score:4, Interesting)

    by gweihir ( 88907 ) on Friday June 15, 2012 @12:03AM (#40331707)

    Simply put, as Intel has no standing in the ARM market (and AMD has now), Intel has every motivation to distort the facts.

    That said, there is indication that while x86 is not in principle more power-hungry than ARM,in practice, on silicon, it is today. The main reason is that it requires more chip area and more complex circuitry, which in practice leads to higher power consumption because of communication and signal distribution overheads and because complex circuits are far harder to optimize, not only for power consumption. Again, that does not mean that in principle it is infeasible. But note that larger chip area is also a strong argument against x86 if size matters.

    There is also the fact that low-power ARM is more energy efficient than low-power x86 when you look at the market. So maybe this person is just saying that Intel messed up and failed to make good low-power x86 implementations while ARM did not. Looking back at power-disasters like the P4, this would be plausible as well. If, on the other hand, I look at CPUs like the AMD LX800 x86 offering, (e.g. used in the Alix boards), these are pretty power efficient and may even get into ARM ranges. They are pretty slow at full load though and have a large chip area.

    So my impression is that the Intel person just said that while they do not have any offering comparable to ARM, it is their fault and not a fundamental problem of x86. I am unsure this is right, although I certainly agree that Intel does not have a leg to stand on in the market for power-efficient CPUs.

  • by Anonymous Coward on Friday June 15, 2012 @12:03AM (#40331711)

    The processor architecture is not wildly different between manufacturers. The System On Chip designs in which the CPU is just one element is what makes them different. Should Intel produce custom x86 SoC you can expect the same.

    Intel is producing x86 SoCs (medfield) and yes, they are not PC compatible.

  • by naasking ( 94116 ) <naasking@gmaEULERil.com minus math_god> on Friday June 15, 2012 @12:22AM (#40331791) Homepage

    There's nothing inherently "superior" about ARM or PPC instruction sets.

    Superior to x86? Sure there is. x86 is a mish mash of instructions many of which hardly anyone uses except for backwards compatibility, but that still cost real estate on the CPU die. That's real estate that could be spent on bigger cache or more registers. ARM is a much better instruction set by comparison.

  • Comment removed (Score:4, Interesting)

    by account_deleted ( 4530225 ) on Friday June 15, 2012 @12:35AM (#40331855)
    Comment removed based on user account deletion
  • by Bert64 ( 520050 ) <bert AT slashdot DOT firenzee DOT com> on Friday June 15, 2012 @02:16AM (#40332303) Homepage

    If you read the article, Bell keeps on going back to the manufacturing process as Intel's main advantage. He says things like, "our competitors are going to have trouble making it to the 9nm scale." That's where their advantage is, and he knows it.

    So basically he has a more efficient engine, but rather than give customers a more efficient car he adds lots of unnecessary weight that provides no benefit to users, so that the overall package isn't any better than what everyone else is offering.

    If he put that more efficient engine, in a car as lightweight as everyone else's then customers would benefit from a superior product.

  • Comment removed (Score:3, Interesting)

    by account_deleted ( 4530225 ) on Friday June 15, 2012 @02:41AM (#40332403)
    Comment removed based on user account deletion
  • by msgmonkey ( 599753 ) on Friday June 15, 2012 @02:58AM (#40332449)

    Any superscaler processor is going to be doing instruction conversion, this includes RISC instruction set processors. The micro-ops in Intel processors convert to are less than RISC instructions. Once you start implementing things like Tomasulo the traditional advantages of RISC are eroded. If this was n't the case Intel would have never been able to leverage their process advantage to get better performance whilst retaining the x86 instruction set.

    In a high performance processor instruction set is irrelavant since 80%+ of the die area is cache any way.

  • by TheRaven64 ( 641858 ) on Friday June 15, 2012 @04:45AM (#40332845) Journal

    The instruction decoder is such an absurdly tiny part of a modern CPU that it really doesn't matter.

    Not true. It is quite a small part, but it is the part that you can not turn off or put in a low power state as long as the CPU is doing anything. This is why it becomes important on low-power systems: it's a constant power drain. Big FPUs and SIMD units draw a lot more power, but they draw almost nothing when executing scalar integer code.

    CISC often has the ultimate advantage simply because it makes better use of the code cache.

    If you're comparing to something like the Berkeley RISC or Alpha architecture, yes. If you're comparing to ARM... not so much. In the comparisons I've done, on both compiler-generate code and hand-written assembly, ARM and x86 are within 10% of each other in terms of code size with ARM smaller in most cases. Note that this was comparing ARM to x86 and x86-64. For a modern ARM core, you would use the Thumb-2 instruction set, which is typically about 30% smaller, and 50% smaller in the best case.

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