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JPMorgan Rolls Out (Another) FPGA Supercomputer 210

Posted by timothy
from the we-call-this-one-the-fleecer dept.
An anonymous reader writes "JP Morgan is expanding its use of dataflow supercomputers to speed up more of its fixed income trading operations. Earlier this year, the bank revealed how it reduced the time it took to run an end-of-day risk calculation from eight hours down to just 238 seconds. The new dataflow supercomputer, where the computer chips are tailored to perform specific, bespoke tasks (as explained in this Wall Street Journal article) — will be equivalent to more than 12,000 conventional x86 cores, providing 128 Teraflops of performance."
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JPMorgan Rolls Out (Another) FPGA Supercomputer

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  • More Speeds Please (Score:2, Informative)

    by fsckmnky (2505008) on Thursday December 15, 2011 @08:11PM (#38391478)

    equivalent to more than 12,000 conventional x86 cores, providing 128 Teraflops of performance.

    128 Tflops / 5 Tflops = 25.6 AMD dual gpu video cards.

    25.6 x $700+/- = $17,920

    I wonder what they paid for it.

  • by Anonymous Coward on Thursday December 15, 2011 @09:04PM (#38392124)

    Actually, almost all FPGAs are SRAM-based and reconfigure (program) themselves every time they power on. The biggest problem is the compiler tools themselves (the Xilinx tools are pretty horrid all things considered).

    Will be interesting to see how long it takes them to move to GPUs. They aren't as flexible but the raw amount of computing power is much cheaper. Then again, we're talking about banks, heh

  • Re:All this.. (Score:2, Informative)

    by fsckmnky (2505008) on Thursday December 15, 2011 @09:27PM (#38392358)

    3. when everything is leveraged 30-50x there is nothing you can do to provide stability that is not make-believe

    Except of course, limit the amount of leverage allowed for any specific market or player, as they already do.

    Whether the limits are being sanely applied or set at appropriate levels is another issue.

  • by gentryx (759438) * on Friday December 16, 2011 @08:53AM (#38396234) Homepage Journal

    Sadly, both stories lack details on how the FPGAs are used in the computing architecture. Instead the spend great lengths on listing telephone number like, meaningless speedup comparisons with conventional hardware. A typical drawback of FPGAs is that they cannot accommodate as many floating point units (FPUs) per chip as current GPUs and that FPGAs run at about 10x lower clock speeds. Their advantage however, is that the internal chip architecture can be reconfigured to match the algorithm, so that all FPUs run at maximum efficiency. At the end of the day, it really depends on the algorithm, whether it's run best on FPGAs, GPUs or standard CPUs. This is also the reason why one cannot say that an FPGA is X times faster than a GPU: it really depends on the algorithm.

    Maxeler, the manufacturer of the machine, had a booth at SC11. The basic component is the MAX3 [maxeler.com] card, a PCIe 2.0 8x card with up to 96 GB of DRAM on board. The boards are optimized for data stream processing. This is not unlike how GPUs are architectured.

    Up to 4 of those boards are located in a MaxNode, which can then be networked via 10Gbit Ethernet or InfiniBand. Multiple MaxNodes can be put into a MaxRack, which can also be seen in the WSJ article. The MAX3 boards can be connected via a custom MaxRing network, which provides a bandwidth of 8 GB/s.

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