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Graphics Virtualization Hardware Technology

Inside NVIDIA's Massive Hardware Emulation Lab 51

Posted by timothy
from the serious-gear-porn dept.
MojoKid writes "NVIDIA recently decided to give the public a look at their massive investment in hardware emulation technologies. Hardware emulators are specialized systems that can be programmed to emulate any specific architecture. In NVIDIA's case, a standard x86 system is connected to a powerful hardware emulator that's been pre-programmed to emulate a GeForce GPU that's still under design. The testbed generates the code in question and sends it over to the emulator, which then executes and returns the output. The emulators are massive machines that can be connected together and scaled for capacity and performance. NVIDIA's Indus emulator can emulate up to two billion gates and in their entire facility, the company can emulate up to 4 billion total."
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Inside NVIDIA's Massive Hardware Emulation Lab

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  • Direct source (Score:5, Informative)

    by Anonymous Coward on Thursday May 19, 2011 @02:46PM (#36182804)

    Why not link directly to the blog post instead of a rewording of it?

    http://blogs.nvidia.com/2011/05/sneak-peak-inside-nvidia-emulation-lab/ [nvidia.com]

  • Re:Sounds cool (Score:4, Informative)

    by alvieboy (61292) on Thursday May 19, 2011 @03:20PM (#36183214) Homepage

    Also, "gates" probably refers to Boolean logic gates.

    I think the term "gates" is abused and misused here, and in other articles. Not everything that goes on chip is a "logic gate", not even "gate", and they ought to be simulated as well. Think about clock modulators, PLL's, DCMs, for example. Other more esoteric thing exists.

    Doing a transistor-level simulation is also very expensive here. This is usually done on the low-level blocks only (and perhaps before going into silicon).

    What you simulate most of the time is RTL - Register Transfer Level. This includes not only plain logic paths, but synchronous elements like memories, flip-flops, and others.

    Being used to RTL simulation (I do a lot), those numbers are absolutely impressive. I often spend an hour simulating only a few microseconds. And the outputs of simulation are *huge* - imagine you have 1 million signals on the chip, and your freq. is 1MHz. This means you will retrieve 1 million * 1 million signal data for a one second simulation.

    Álvaro

  • Not the same at all. (Score:4, Informative)

    by SanityInAnarchy (655584) <ninja@slaphack.com> on Thursday May 19, 2011 @05:33PM (#36184924) Journal

    Things like NESticle are software emulators. The idea is to reverse-engineer an existing piece of hardware so that you can figure out how to make software which does the same thing, but not necessarily in the same way -- you want to be able to run software that runs on the NES, say, but you don't care at all whether the program in your computer contains an exact replica of every chip on the NES. Even if you wanted the identical behavior, you still wouldn't need to give it an exact replica.

    This is a hardware emulator in both senses -- it is itself a big pile of hardware, and it's emulating hardware, exhaustively, in every detail. The idea here is that you want to have as much assurance as is reasonably possible that when you actually fab that chip, it's going to do what you think it will. You're not just testing that your software which will run on that card will do what it's supposed to do -- that'd be considerably easier, we have things like CUDA and software implementations of OpenGL if that was the only issue. No, you want to be sure that the hardware itself, as you designed it, will work when you actually build it.

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