Samsung '3D' Memory Coming, 50% Denser 87
CWmike writes "Samsung on Tuesday announced a new 8GB dual inline memory module (DIMM) that stacks memory chips on top of each other, which increases the density of the memory by 50% compared with conventional DIMM technology. Samsung's new registered or buffered (RDIMM) product is based on its current Green DDR3 DRAM and 40 nanometer (nm)-sized circuitry. The new memory module is aimed at the server and enterprise storage markets. The three-dimensional (3D) chip stacking process is referred to in the memory industry as Through Silicon Via (TSV). Samsung said the TSV process saves up to 40% of the power consumed by a conventional RDIMM. Using the TSV technology will greatly improve chip density in next-generation server systems, Samsung said, making it attractive for high-density, high-performance systems."
Re:Saves up to 40% power savings? (Score:5, Informative)
Googling a bit, one test showed 2x1 GB of memory consuming up to 7.28 watts.
http://www.tomshardware.com/reviews/hardware-components,1685-13.html
For PC, that's practically nothing. For mobile devices, every watt counts.
Re:Yeah, what about using both sides? (Score:2, Informative)
They don't use both sides because the back side is where the robot handlers touch the wafer to move it. At several steps in the wafer process it is vacuumed down to chucks to hold the wafer and keep it flat. If you did print on the back the pattern would be damaged by all of the backside handling and ruin the chips back there. There is also the issue of front to back wafer alignment. While I am sure some college kids or some profs will come on and try and quote some things from some text books and sales pamphlets, it is not an easy thing to do and adds an even greater level of complexity to your registration.
Not to mention that the wafer when it goes through a fab is thicker than when it goes into chips. After it comes out of the fab it goes to back grind before it goes to the diamond saw so there is less to cut though and the finished chips can be thinner. A chip cut and put into a package without that back grind would have issues fitting into some packages. Especially when multiple chips are put into a package.
When they are talking 3D chips, they are stacking patterns on the same side of the wafer.