Junctionless Transistor Could Simplify Chip Making 100
An anonymous reader writes "A novel transistor architecture has been developed by a team of researchers led by Jean-Pierre Colinge at Tyndall National Institute at Cork, Ireland. Not many technology developments can be truly described as 'a breakthrough' or "revolutionary' but this might just fit the bill. It does depend on the extremely small dimensions of silicon nanowires just a few dozens of atoms wide. EE Times picked up on an announcement of a paper on the topic being published by Nature Nanotechnology."
Finally... (Score:5, Interesting)
Yawn. (Score:5, Interesting)
Old news. This kind of thing has been thrown around a lot, for several years.
But some university made a single transistor, and now suddenly the revolution is forthcoming. Last week it was graphene transistors, the week before that, 100GHz transistors on diamond.
This is the direction that things are probably going to move - different geometries, wrap-around gates to improve gate control - and there's going to be a lot of materials science and new (to CMOS) materials needed. But we're not there yet, we're quite a ways out... and in many ways, this isn't even the limiting factor in microprocessors - it's wire delay, parasitic capacitances. That's why so many groups and corporations are focusing on silicon and polysilicon waveguides - using light as an interconnect, nearly lossless, instant, no parasitic coupling (ideally).
I don't want to downplay what they did *too* much... but universities piss me off when they just become a PR machine. It's just plain irresponsible; it's a pissing match, and if just half of the things they claimed were true, that how things are right now would seem like the dark ages.
Re:Finally... (Score:4, Interesting)
Just because your iPhone has a 600MHz processor does not make it equivalent to a 10 year old computer. It is not running a fully functional operating system, does not have the same capabilities as a desktop system of that era even in sheer number crunching capabilities, and if your portable device attempted such, it would quickly drain the batteries due to inefficient components that lose a significant portion of their energy to current leakage and heat dissipation, while at the same time overheating the components themselves to a point of failure. Try using you iPhone to render high polygon count 3D models and see how it performs. Besides these simple points, there were distinct leaps in production technology that allow this approximation of performance to even occur. More efficient chip based transistors being a primary factor of not needing a large cooling system attached to the back of your phone to allow your display to show you video at a decent framerate
A virtually ideal component is one that is almost 100% efficient, with little to no leakage and heat loss. With the reduction in waste heat, more components can be in close proximity to one another without interfering in their operation by skewing values due to heating. This new design is much faster than a traditional transistor, requires much less energy to bias, and is easy to manufacture.
From the second page of the article:
"The current flows in a very thin silicon wire and the flow of current is perfectly controlled by a `wedding ring` structure that electrically squeezes the silicon wire in the same way that you might stop the flow of water in a hose by squeezing it. These structures are easy to fabricate even on a miniature scale which leads to the major breakthrough in potential cost reduction," explained Professor Colinge.
This squeezing is a biasing voltage, and no actual current flow through the gate is required, only a potential. Since there is no valence junction to bias before current can flow from source to drain, you do not need to supply signals of sufficient voltage to be registered, again requiring much less energy to operate.
Cost reduction is another key benefit of this technology, rather than having to grow the silicates with an inaccurate doping method over a preformed substrate, which leads to inefficiencies in power consumption and the need for large transition zones due to no two junction type semiconductors having the exact same biasing voltages, which is why standard CMOS is off at 0.8V or lower, and generally on at 2.0V or higher, depending on tolerance. Transistors using less power to transition from one state to the other require less powerful power supplies, enabling even more compact designs, and to top it off, the technology is robust enough to directly interface with CMOS.
I realize it takes more than a cursory knowledge of electronics to understand the true implications of this, which is why a number of you have made incorrect assumptions, but with a bit of extra reading, I firmly believe that at least some of you could become as excited about this breakthrough as I am.
Re:Finally... (Score:3, Interesting)
The article itself suggests this. I'm not familiar enough with lithography to comment on the equipment -- it could very well be prohibitive -- but the actual structure of the transistor would be far simpler; making it easier in the sense that there will be less variation in process to deal with.
With no need for two junctions, there will be no danger of latch-ups; less source/drain capacitance and most importantly, the smallest feature size will no longer be just part of the transistor.
Not having access to the full article, I'm not entirely certain of the details of how this FET is constructed but from the description, it sounds like a piece of silicon surrounded by thin oxide and attached to a metal. This, in principle, is similar to dual-gate FETs, only it takes it a few steps further.
What struck me is that the article mentioned that no doping is required; which would be odd considering polysilicon isn't a semiconductor by itself.
The gradient is less of an issue in an FET? (Score:4, Interesting)
In a junction transistor, the gradient is abrupt and necessary to the operation of the transistor.