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IBM Hardware Technology

Graphene Transistors 10x Faster Than Silicon 170

Posted by kdawson
from the can't-be-too-rich-either dept.
Asadullah Ahmad writes "IBM has created transistors made from carbon atoms, which operate at 100 gigahertz, while using a manufacturing process that is compatible with current semiconductor fabrication. With silicon close to its physical limits, graphene seems like a viable replacement until quantum computing gets to desktop. Quoting: 'Researchers have previously made graphene transistors using laborious mechanical methods, for example by flaking off sheets of graphene from graphite; the fastest transistors made this way have reached speeds of up to 26 gigahertz. Transistors made using similar methods have not equaled these speeds.'" The other day we discussed what sounds like similar research by a group of scientists at Tohoku University; that team did not produce transistors, however.
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Graphene Transistors 10x Faster Than Silicon

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  • by eldavojohn (898314) * <eldavojohnNO@SPAMgmail.com> on Friday February 05, 2010 @11:20AM (#31034718) Journal

    The other day we discussed what sounds like similar research [slashdot.org] by a group of scientists at Tohoku University; that team did not produce transistors, however.

    Surely that is some sort of joke. From the summary of the Tokyo University article:

    A new paper entitled Epitaxial Graphene on Silicon toward Graphene-Silicon Fusion Electronics published by a group of physicists at Tohoku University in Japan has demonstrated that they can grow graphene on a silicon substrate and pair that technique with conventional lithography to create a graphene-on-silicon field effect transistor.

    Not to mention that article is a myriad of highly moderated comments admonishing the staleness of graphene on silicon transistors.

  • Just remember. (Score:5, Informative)

    by AltGrendel (175092) <ag-slashdot@@@exit0...us> on Friday February 05, 2010 @11:32AM (#31034840) Homepage
    The first patent for transistors was filed in 1925.
    Look where they are now.
  • by ground.zero.612 (1563557) on Friday February 05, 2010 @11:33AM (#31034848)

    The other day we discussed what sounds like similar research [slashdot.org] by a group of scientists at Tohoku University; that team did not produce transistors, however.

    Surely that is some sort of joke. From the summary of the Tokyo University article:

    A new paper entitled Epitaxial Graphene on Silicon toward Graphene-Silicon Fusion Electronics published by a group of physicists at Tohoku University in Japan has demonstrated that they can grow graphene on a silicon substrate and pair that technique with conventional lithography to create a graphene-on-silicon field effect transistor.

    Not to mention that article is a myriad of highly moderated comments admonishing the staleness of graphene on silicon transistors.

    From reading what you quoted, it's not certain that Tohoku produced anything, at least not a graphene transistor. They did however demonstrate that they can grow graphene on a silicon substrate, and that they can pair that technique with conventional lithography to create a graphene-on-silicon field effect transistor. It's just not clear that they did create a graphene transistor, or at least anything comparable to what IBM apparently is producing.

  • by VitaminB52 (550802) on Friday February 05, 2010 @11:37AM (#31034880) Journal
    Maybe you would like to read http://en.wikipedia.org/wiki/FET [wikipedia.org]
  • by John Hasler (414242) on Friday February 05, 2010 @11:45AM (#31034976) Homepage

    Note that the Tohoku group grew graphene on silicon while IBM produced graphene transistors on silicon carbide. These are complementary efforts, not competing ones.

  • by Anonymous Coward on Friday February 05, 2010 @11:51AM (#31035032)
    In the paper they talk about how they cut the substrate, grew the graphene and

    For the fabrication of GOS-FET, the ohmic electrodes are defined by the lift-off process with Ti/Au. The device isolation is carried out by oxygen plasma etching to remove the graphene out of the device area. As the gate stack, 200-nm thick SiN is deposited by plasma-enhanced chemical vapor deposition (PECVD). This is followed by the gate metallization with Ti/Au. The probing pads are connected to the ohmic electrodes via holes through the gate stack. The gate length is 10 um and the channel width is 20 um. Standard optical lithography with a mask aligner is used for all process steps.

    Yes, they actually did make a FET.

  • by noidentity (188756) on Friday February 05, 2010 @11:59AM (#31035140)

    The prototype devices [...] can switch on and off [...] about 10 times as fast as the speediest silicon transistors.

    These transistors are only about 9x faster than silicon, not 10x faster as the Slashdot headline claims.

  • hold yer horses (Score:5, Informative)

    by lurgyman (587233) on Friday February 05, 2010 @12:19PM (#31035380)
    Before you get yourselves worked up, realize there is no mention in this article or the original article in "Science" for applying this for computing. There's somewhat of a misstatement in the technology review article - if you look at the actual article in Science (http://www.sciencemag.org/cgi/content/abstract/327/5966/662), the 100GHz figure is the unity (or cutoff) gain frequency (e.g., how high of a frequency you can build an amplifier) and not switching. There is no mention of switching in the paper by the IBM scientists, and that is the application relevant to computing. Even TFA's expert is talking about using this in analog communication frontends, folks. Sorry.
  • by Anonymous Coward on Friday February 05, 2010 @12:23PM (#31035436)

    They mean the gate dielectric (which is used for the majority of transistor designs, silicon or otherwise) not that the transistors need insulation from the environment - graphene is more sensitive to the dielectric material (ie the enivronment around the transitior) than silicon. Extreme external (ie military) environment is irrelevant as the entire chip is packaged up anyway.

  • by wurp (51446) on Friday February 05, 2010 @12:29PM (#31035506) Homepage

    I think you're just too young to have seen the whole chain of "limits" on modem speeds. For a long time we were told that 9600 baud was the absolute maximum speed, limited by the fundamental physics of modem technology over phone wire.

    See http://en.wikipedia.org/wiki/Modem#Breaking_the_9.6k_barrier [wikipedia.org]

  • by robathome (34756) on Friday February 05, 2010 @01:12PM (#31036164)

    I think you're just misunderstanding the problem.

    The "baud rate" of telephone lines is pretty slow. Baud rate is the number of symbol transitions per second the media can support. Baud rate and bits/second have not been equivalent since Bell103a/V.21 frequency-shift-keyed modems, where 300 baud meant 300 bps, each state transition being a discrete tone that indicated a "mark" or "space" (0/1). From then on, Bell 212a/V.22 used phase-shift keying to get 1200 bps out of a 600 BAUD symbol rate, encoding two bits of information per symbol.

    POTS lines are pretty pokey - the practical maximum BAUD rate is less than 3500 symbols/sec. Where speed advancements were made in later evolutions of POTS modems were in the number of bits that could be encoded per symbol, using QAM and Trellis Modulation. A 33.6 kbps modem is encoding 10 bits per symbol onto a 3429 baud carrier.

    So, when you kept hearing "phone lines max out at less than 4800 baud", that was correct. The engineers kept wringing higher bit rates out of narrow-band POTS by putting more information on each of the symbols transmitted.

    Then, with V.70 and V.90, the modulation schemes took advantage of certain characteristics of non-muxed POTS lines to use PCM digital encoding instead of an analog audio carrier. Unfortunately, if you were serviced through a SLC-96 ("Slick") muxed subscriber loop, which multiplexed the signal from your subscriber line to the central office, you could only connect with older analog modulation schemes such as v.32/v.32bis/v.34.

  • by robathome (34756) on Friday February 05, 2010 @01:46PM (#31036676)

    The link you provide speaks to the problems of bit-packing on the symbol states, and the solution of Trellis Modulation, which I mentioned. Trellis coding allowed for packing more than 4 bits to each symbol without increasing the error rate, leading to the development of the v.32bis standard and 14.4Kbps modems. Which is what I said - it wasn't high baud rates, but better bit packing that realized faster speeds.

    And you're still saying "baud" when you mean "bits per second".

  • by imgod2u (812837) on Friday February 05, 2010 @04:47PM (#31039128) Homepage

    [quote]Again, that's very easy to say in retrospect. I believe this is an almost identical situation: we have a very complex set of interactions from which we derive one number: "transistor switch speed". We believe we understand those relations well enough that we can derive a fastest speed any possible silicon design can give.[/quote]

    No. We know the fastest speed of a MOSFET made with current fabrication technologies. The problem is that MOSFET (specifically CMOS topologies) has very very good characteristics that we like and the fabrication infrastructure (and tooling industry) exists amortizing the cost. There are many many other circuit topologies and manufacturing methods (silicon germanium, GaAs, etc.) that produce faster transistors. But moving to those are 1. expensive and 2. comes with their own limitations.

    Graphene isn't perfect either. Aside from the difficulties in fabricating it, there's also the problem that unlike MOS, there's isn't a way (yet) to make a good graphene PFET. CMOS circuits are the way they are today because using a PFET-NFET topology works really really well for digital circuits.

    Graphene (and carbon nanotubes) also have the problem that they don't really have an "off" state. There's less conductive and more conductive. CMOS at small geometries may leak current but nothing like CNT's and Graphene do. The circuits made from them are very power hungry (at least with current circuit topologies).

    There's a lot of research trying to come up with better circuits to utilize the incredible on-current states without tunneling power between VDD and GND during the "off" state.

    Before Ungerboeck's work, information theory seemed very clear about the fastest possible rate at which data could be reliably sent on the frequencies that would "stay on the wire" without bandwidth bleedover. Ungerboeck just demonstrated that there were artificial assumptions underlying the information coding theory on which that speed was based.

    Shannon Theory very well laid out the maximum data rate that could be transmitted over a medium and Trellis Modulation did not exceed that. The fundamental limits were well known and not wrong. Implementations that existed then simply couldn't come close.

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