Intel Shows 48-Core x86 Processor 366
Posted
by
timothy
from the soon-will-be-in-calculators dept.
from the soon-will-be-in-calculators dept.
Vigile writes "Intel unveiled a completely new processor design today the company is dubbing the 'Single-chip Cloud Computer' (but was previously codenamed Bangalore). Justin Rattner, the company's CTO, discussed the new product at a press event in Santa Clara and revealed some interesting information about the goals and design of the new CPU. While terascale processing has been discussed for some time, this new CPU is the first to integrate full IA x86 cores rather than simple floating point units. The 48 cores are set 2 to a 'tile' and each tile communicates with others via a 2D mesh network capable of 256 GB/s rather than a large cache structure. "
Re:Code Name is Offensive (Score:5, Insightful)
Yet another cloud? (Score:5, Insightful)
Why is everything called cloud these days? Yet another du jour buzzword. Is this really justified here?
Re:Yet another cloud? (Score:5, Insightful)
When it comes to marketing cliches, when it rains, it pours.
Idle benchmarks (Score:5, Insightful)
With 48 processors you can have your system 98% idle running your typical application at full speed rather than just 50% or 75% idle as is the norm now.
Re:Advantages over just adding more FPUs? (Score:3, Insightful)
Re:Advantages over just adding more FPUs? (Score:5, Insightful)
Can someone elaborate on why you'd want 48 full processors, rather than a processor with two (dual) or four (quad) "cores" (I'm presuming core in this case == FPU in the article).
Bad assumption. In this case, we're talking about (what you would consider) a 48 core CPU. Previous designs would have apparently contained only a small number of full processing cores, and a large number of parallel units suitable only for floating point calculations (which can be great for various types of scientific calculations and simulations). This new design contains 48 discrete IA x86 cores.
Seems like the type of processor Grand Central Dispatch [wikipedia.org] was designed for.
Yaz.
Re:Code Name is Offensive (Score:2, Insightful)
Oh please don't go over your head in this.
India's tech field has improved, but not to the point of design such a chip yet !
Without the West, India is still a big nothing !
Re:Code Name is Offensive (Score:3, Insightful)
Without the West, India is still a big nothing !
And vice versa :p
Re:Code Name is Offensive (Score:3, Insightful)
True. We don't have many BIG cats in the U.S. ... just a lot of FAT cats (greater concentrations can be found in the vicinity of State Capitols and Washington D.C.).
Re:And yet it's still... (Score:1, Insightful)
No, mentioning a bad architecture, like Itanium, is not going to put a dent into that argument. ^^
Similarly, just repeatedly calling the x86 architecture "crappy" does not actually make it "crappy." Despite having compatible instruction sets, the architecture behind Intel's modern processors has practically nothing else in common with legacy chips like the 386 or 486. Why don't you actually tell us what makes this 48-core processor so much worse than anything else out there?
Or would that require you to stop being a jackass?
Re:And yet it's still... (Score:3, Insightful)
2K cores (Score:2, Insightful)
Re:2K cores (Score:2, Insightful)
It's probably even ruder to point this out, but by the time these 48-core processors are commercially available and affordable by institutions with lesser budgets, those with large budgets will be on to bigger and better things. At the very least, if these procs are the best way to do things, then the larger institutions will simply have a dozen racks full of blades with these processors, so the rack or two others can afford will still be way behind the curve.
Re:Advantages over just adding more FPUs? (Score:3, Insightful)
The worst thing about his assumption is that it is wrong. But that is sufficient to make it bad.
This is simplistic and wrong. It is true that fewer cores implies less inter-core communication, but this is not a design criteria for putting fewer cores in a system. While it is true that having more cores requires more threads/processes to achieve high utilisation it is not necessarily true that having fewer cores with more functional units per core allows high utilisation across workloads with few threads.
Increasing the number of functional units per core runs into diminishing returns quickly as keeping all of them fully fed requires lots of implicit parallelism in the program. To be able to execute sequential workloads well on a system with few cores and many functional units, there must be lots of independent chains of operations within the program. Not many sequential programs exhibit this property, and those that do can often be rewritten into a threaded form. Hence a system with more cores is more efficient on server-style workloads (lots of fully independent requests) and on workloads with lots of fine-grained parallelism if the programmer can rewrite the code using threads.
The last if is a big one, and it is the only reason that we are seeing mainstream designs with "few" cores. If we knew how to parallelise the code better then designs with many cores, and fewer functional units per core are a lot more efficient. One of the main reasons is that the size of the register file needed on a core is proportional to the amount of data needed to be kept in-flight to keep the functional units full. But as the number of registers increases, and the number of read ports into functional units increases the complexity of the register file does not grow linearly (if memory serves I think it is quadratic).
So designs with few cores, but large register files, are less efficient than more cores (even with more associated issue/despatch) with more registers per core. Of course this is not an exact science as finding representative benchmarks is hard, and then creating a design to hit the right set of parameters is also hard. But that is the reason that Intel have tried this design - research. It's also the reason that designers don't just throw their transistor budget at maximising the number of units within a single core.