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Comments: 124 +- Hardware: Intel Allows Release of Full 4004 Chip-Set Details on Monday November 16, @03:31PM
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mcpublic writes "When a small team of reverse engineers receives the blessing of a big corporate legal department, it is cause for celebration. For the 38th anniversary of Intel's groundbreaking 4004 microprocessor, the company is allowing us to release new details of their historic MCS-4 chip family announced on November 15, 1971. For the first time, the complete set of schematics and artwork for the 4001 ROM, 4002 RAM, 4003 I/O Expander, and 4004 Microprocessor is available to teachers, students, historians, and other non-commercial users. To their credit, the Intel Corporate Archives gave us access to the original 4004 schematics, along with the 4002, 4003, and 4004 mask proofs, but the rest of the schematics and the elusive 4001 masks were lost until just weeks ago when Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs and improving the circuit-extraction software that helped him draw and verify the missing schematics. His interactive software can simulate an ensemble of 400x chips, and even lets you trace a wire or click on a transistor in the chip artwork window and see exactly where it is on the circuit diagram (and vice-versa)."
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So in 2047... (Score:4, Funny)
When we get the Core i7 details, will it seem as quaint as the 4004 does now?
Re:So in 2047... (Score:4, Interesting)
At that point in time retired Intel employees would say: "It was all binary... You know ones and zero's on solicon *audience laughs*, which was a bunch of sand basically. Heh... And at that time we were bumping against the limits of this technology so we decided to bake a multitude of them on a single die. Haha... dear God... can you imagine? *audience laughs* Programming this was, well you can imagine, not so pretty. Taking advantage of this technology was still very hard at that time, but OpenCL largely made up for it, so... Any questions?"
-"I worked for a RAM company at that time. And I realised that while the CPU was in fact doing everything in parallel, the RAM was actually serialy read out. What was your stand on this?"
Ühm... *audience laughs* That question is for [person sitting next to the speaker]. *audience laughs harder*
I think that the Core i7 is a little bit too complex to understand right away. I mean with the 4004 everything was realy, realy basic. It had a design team consisting of four people. Nowadays it takes a whole team to improve it all. So I guess the awnser is no.
Parent
Re:So in 2047... (Score:5, Funny)
I mean with the 4004 everything was realy, realy basic. It had a design team consisting of four people. Nowadays it takes a whole team to improve it all.
Yes, one person for each bit. Nowadays you need 64 or 128 person teams.
Parent
Re: (Score:2)
How are you supposed to find out if the chip is working right if you don't have enough people to stand or sit based on their current instruction?
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That's why Intel's HR department has such a high turnover rate. Scheduling vacation time is a massive headache, let alone the unexpected family emergencies. They've tried to automate it, but there's a lot sitting in the inbox to process at any time.
Re: (Score:3, Interesting)
No. (I know the question was rhetorical, but I can't resist answering).
The 4004 had 2,300 transistors. A college student can create and debug a processor more powerful than that in a semester. It is possible to memorize the entire thing. A Core i7 has around 300 million transistors. Unless human intelligence changes significantly, one human could not memorize and understand 300 million transistors.
A great presentation of it all on YouTube (Score:5, Informative)
Link: http://www.youtube.com/watch?v=j00AULJLCNo [youtube.com]
Italian business (Score:5, Interesting)
If one was produced with a 40nm process... (Score:2)
I wonder what clockspeed it would get. I know it's completely useless/pointless, but I'd be interested to see anyway.
Re: (Score:3, Interesting)
better question, how would they physically handle a processor that small, 4004 has 2300 transistors, http://en.wikipedia.org/wiki/Intel_4004 [wikipedia.org] , and the i7 has 731 million transistors at 45nm at 263 mm^2, http://www.legitreviews.com/article/824/1/ [legitreviews.com] , So by those numbers the 4004 on a 45 nm process would have an area of .00082749 mm^2 or 1/317826th the physical size of an i7 die. Disclaimer: this is a very rough calculation, but in any case it is more than 5 orders of magnitude smaller than an i7. On the other
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I thought Intel was already doing something like this? It was going to somewhat similar to a Cell processor except with something like 128 Pentium 1 cores on it.
Re: (Score:3, Informative)
Probably the same 740kHz that the original 4004 had.
The manufacturing process used has nothing to do with the maximum clock speed a chip can achieve. It's about energy bleeding (heat loss) and the transistor density. If you manufacture a 4004 using 1950's-era technology, with actual honest-to-goodness 1mm-thick copper wire and large physical transistor switches, it'd be a *lot* bigger, but it'd achieve the same 740kHz that the design allows for.
The reason using a smaller manufacturing process translates int
Re:If one was produced with a 40nm process... (Score:5, Insightful)
This means that you can cram more transistors in to the same area of silicon, allowing you to complete more operations per clock cycle.
This is true, but smaller process nodes also produce faster transistors. When you make things on the chip smaller, you have the practical effect of reducing parasitic capacitance in transistors and interconnect. Lower capacitance means a smaller RC time constant (using a first-order model), so logic will work faster. Intel's 45nm process can create an inverter with a delay of less than 5 ps.
Your statements imply that transistors have a fixed speed, and that the only way to improve performance is parallelism. This is false.
Parent
Re: (Score:2)
smaller process nodes also produce faster transistors
I was thinking the same thing. In fact, I'd be inclined to believe that, since the resulting chip would be so small, you could actually get it up to a higher clock speed than a current CPU. However, you wouldn't be able to interface it with anything, because you'd never get I/O signals at that frequency off-chip, without ruining them. You'd need to have at least some memory and some type of I/O controller on the same chip, to make it work.
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For that matter, what if you made a CPU with a hundred million [slashdot.org] of these?
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This would be an interesting homework problem for a digital design class. First, find the single-cycle instruction that will take the longest amount of time. Then, figure out the critical path. Find the logic delay given a particular modern standard cell [wikipedia.org] library.
So, will it... (Score:4, Funny)
j/k
This should actually be quite cool. I can see garage-based tinkerers messing with this chip, the registry and even coming up with a retro User Group.
Re: (Score:2, Funny)
Can you compile a Linux kernel into 2048 bytes?
Re: (Score:2)
Yes. Linux will run on anything from a supercomputer to a wristwatch.
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Linux requires at least a 386, always has. I'm not sure there's a UNIX that will run on any 8-bit or earlier processor.
Federico Faggin, intel4004.com (Score:4, Informative)
http://www.intel4004.com/ [intel4004.com] goes into much greater detail about Federico Faggin (primary co-developer and project leader), and the story of his accomplishments before and at Intel, his physical signature on all 4000 series chips, Intel's successful attempt to discredit him and patent his invention (the buried gate) that he invented at Fairchild before coming to Intel, and his departure to found Zilog with some members of his older design team.
Intel has been playing their game their way for a very long time.
Control Systems using 4004 (Score:5, Interesting)
In the very early 70s our engineering group was interested in using the new 4004 to simplify the production of control systems for heavy machinery (windlasses, hydraulic systems, etc). The machinery itself was slightly different from contract to contract and even from item to item within a contract so we had to design a new control system for each unit. When the 4004 came out we were excited to see if we couldn't do it cheaper and faster using a microprocessor.
We had moved from relays and discrete wiring to CMOS components on printed circuit boards and thought that was a big step. CMOS could be run at 15vdc which meant that the noise inherent in the environments our machinery worked in would not be quite as big a problem.
Unfortunately we discovered that we had several problems including the limited instruction set and memory capabilities of the 4004 along with the lower voltages needed so we stuck to CMOS until I left a couple of years later.
Still, the 4004 was my introduction to microprocessors and that changed the course of my career from electronics and electronic control systems to digital control systems and computers.
It's been an exciting ride, too. I am grateful to have grown up with the technology.
Non commercial use? (Score:4, Funny)
Available for non commercial use? Are they even entertaining the possibility that somoent might try to profit from the design?
Re: (Score:2)
Given the morbid fascination the geek world often has with retro computing, it's not something I'd ground rule myself.
That takes me back (Score:2)
We used a timeshare service via a Model 33 teletype with acoustic modem to access a 4004 assembler. It would spit out a paper tape that we wou
Re: (Score:2)
you must surely agree that compared to Visual Studio, paper tape IS a superior option.
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Re:Awesome! (Score:5, Informative)
For the most part - Newer digital designs are language driven, not schematic driven. The advent of Verilog & VHDL lead to purely digital designs done up in code.
Some of the special devices are done using transistor level design, but synchronous logic these days is a HDL (hardware description language) followed by gate level synthesis, and then autoplace and auto routing.
A lot of fine tuning along the way for high performance items does get tweaked a lot but for the most part, digital chips are created as a coding exercise.
Parent
Re: (Score:2)
While I wouldn't expect them to give out Core, or hell even the "smoking hot" Netburst P4 (damn that thing was a space heater!) but why not the old x86 designs? I mean is there anybody out there that has a real use for a 286 or 386 except for history class? It would be nice to check out those old designs and I doubt they'd be giving away any trade secrets on Core with chips that old.
In fact it would be cool, at least IMHO if we could see Intel 386 VS AMD VS Cyrix VS WinChip, just to see how each company
Re: (Score:3)
*repeats a mantra* I will not feed the trolls, I will not feed the trolls....
Linux is Software. And Red Hat doesn't sell the software, they sell support contracts for the software. You can get RedHat's distribution for free through CentOS and are only paying for technical support and the nice pretty RedHat-specific graphics when you buy RHEL. Nobody is going to make money giving away modern chip designs for anybody else out there to manufacture, because there's no way for them to get an ROI on the developme
Re: (Score:2)
Sun's opened the UltraSPARC T1 and T2, although nobody's spun an ASIC from that.
Alternately, Gaisler Research has the LEON, which is dual-licensed under the GPL and a closed license. Want to use it non-commercially, it's GPL for that, want to use it commercially without giving up the source, you have to pay. And, there's a few SoCs here and there based on it.
Re: (Score:2)
Apparently you couldn't release the internal workings of a system (Linux) and have someone make money from it (Redhat). I agree with you, that would be absurd.
I noticed out of four targets to apply to, not a single one was Intel.
What works for one company probably won't work for many others, and one could easily say it will Never work with All others.
Re:Awesome! (Score:5, Informative)
> If the Core i7 schematics were released, any old fab company could start making their own i7's for next to nothing.
Wrong.
Let's even imagine for the moment that you really meant that they'd release the verilog/vhdl, instead of schematics. There are still a few minor problems in the way:
1 - Intel really does have absolutely top-notch processing capability. Typically their top-end CPU pushes their top-end process for all it's worth, both in performance and capacity. (I'll add the caveat that "all it's worth" is a moving bar, which is why speed bumps and die shrinks come along as a process and design mature.) Chances are most fabs in the world simply won't be able to handle the Core i7 - not enough transistors.
2 - Let's pretend that you have a fab that can put out bigger-than-postage-stamp sized chips, and they can handle the sheer number of transistors. Most likely you still can't hand over such HDL, push a button, and have a layout come out, even bigger and slower. For one thing, a significant fraction of those transistors are in cache - probably SRAM. HDL doesn't build SRAM, it instantiates it. You need either a compiler or an SRAM design team(s) to get the cache(s) built, and they have to be specifically matched to the interface the HDL is expecting - these aren't garden-variety commodity SRAMs, by any means.
3 - So let's pretend we have SRAMs too, and that the design we had in our back pocket could be tweaked to meet the interface requirements of the Core i7. We have datapath/dataflow problems. In the first place, those datapaths are highly regular - kind of like bit-slices. A lot like bit slices, in fact. Most likely the design was carefully partitioned into functional blocks, and those functional blocks were further partitioned, etc. Then they were floorplanned with an eye to the final design. Far from the smallest concern was getting all of those bits from point-A to point-B to point-C. These things have some pretty big buses inside, and just about everything is high-performance.
In short, a schematic, even verilog/vhdl is a far cry from the whole picture. Even in today's push-button world, you don't push-button a thing like the Core i7, or even latest-generation AMD CPUs, to be fair. You need to have a talented, experienced physical design team, and there's as much work there, maybe more, than simply coming up with the logical design. Then again, frequently the logical and physical design may not be that separated - a really tight feedback loop between the two can work well.
So go back to your super-sized non-optimized chip done with push-button tools - oh and by the way, you may have a hard time finding such tools with enough capacity. The resulting chip won't be a little bigger and a little slower - it'll be a LOT bigger and a LOT slower.
Does anyone know what the technology was for the 4004? (Is that metal-gate, with double-metal, or polysilicon gate with single-poly, single-metal?)
Parent
Re: (Score:2, Interesting)
Does anyone know what the technology was for the 4004? (Is that metal-gate, with double-metal, or polysilicon gate with single-poly, single-metal?)
Well, I do look at photomask stacks as part of my job from time to time as a process integration engineer (mask bugs do make it past design rule checking and tapeout sometimes) but I will start with a disclaimer that this chip and process was designed before I was alive.
It looks from the composite drawing that this is a single poly/single metal/self aligned doped poly/source/drain. That should have existed at the time and to my knowledge no metal gate process has been in wide use because of manufacturabili
Re: (Score:2)
It looked like that to me, too. But then I remembered that I working with a metal gate technology later in the 70's, so I wasn't sure. I agree with the red being gate, blue metal, and green diffusion. I didn't take a lot of time looking at the contacts - now that I think a bit more, the metal-gate technology I was working with in the 70's of course had a gate mask, and I saw no such relief on those images. Doh!
Re: (Score:2)
You're being facetious, but you're forgetting that the folks at AMD, NVidia, VIA, IBM, and ARM would all love to get a look at the inner workings and design specifications of the latest Core i7. There's only so much that looking at one
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Can't touch the China i7 though...
Re: (Score:2)
Likewise for me, something like "SAM". It was a nice simple case, but not terribly interesting.
But maybe that's why they do the fake arch - because a real arch would be too complex? At least, that would explain undergraduate classes.
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In my computer architectu
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IA32?
Damn kids these days.. Back when i was your age we had 8 bits and appreciated it!
All kidding aside, learning the Z80 inside and out ( and designing my own 8 bit machine later ) didn't hurt me one bit.
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Kidding aside, I was a 6502 guy back in the day. There was a book called "How to build a microcomputer and really understand it" (or something along those lines) that took you through what all the control lines did and how the interrupts worked, etc. That, and the reading through the OS listing for the Atari 400/800 really gave me a firm grasp on how it all fits together.
I'd really like to get a copy of that book again (loaned it out, never got it back). It had printed
Re: (Score:2)
All professors are heavily in to MIPS, and you, like me, and everyone else who's taken Introduction to Computer Architecture, know why.
I had a feeling about it (see all the 16-bit "KIPS" chips designed by college students after having read through Computer Organization and Design). But I wasn't completely sure that MIPS was the ideal teaching model until it was proven pretty much patent-free by Plasma and Loongson.
Re:Awesome! (Score:5, Interesting)
One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which didn't translate to ANYTHING in the real world. Oh yeah, and it was RISC. *Snoooreeee*
That's only because you dropped out before getting to the FPGA [wikipedia.org] classes!
Any functional CPU design (technically non-functional ones too, for whatever good that would do) can be flashed into an FPGA and become as real as any other silicon chip.
And identical to psudocode, psudo-chipfab can be translated into any real code/fab language by anyone that knows basic design and the target language. You were supposed to be learning the basic design part, so once you got to using a real language used in the real world, you would have some clue what to do with it.
Parent
Re: (Score:2)
Very true
One of the extra courses I could take was making our 32 bit MIPS design run on FPGAs. In that class the teachers would give us pre-designed modules for memory controller, IO (keyboard) and video to boot a very simple OS on them.
Didn't take that course though.
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I guess I'm wrong. They crammed 45 instructions into the architecture using instruction words of varying width.
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I have an original hardcopy Intel 4004 User's Guide I nabbed from the 1970 Wescon exhibition. Reading through that - butterflies. Yes, the quantum weather software butterfly would have been an easier IDE.
Re:Wow! Imagine a Beowulf Cluster (Score:5, Funny)
Parent
Re: (Score:3, Interesting)
Re: (Score:2)
http://hardware.slashdot.org/article.pl?sid=06/11/14/2356255 [slashdot.org]
it's the full specs now (Score:2)